[1]
GONZALEZ R C, WOODS R E, EDDINS S L. Digital image processing using MATLAB [M]. Beijing: Publishing House of Electronics Industry, (2005).
Google Scholar
[2]
XiaoLiangzheng, LiJiuxian. digital image processing [M]. Nanjing: Publishing House of Southeast University, (2005).
Google Scholar
[3]
ChenLijun, YiJunxun, The next generation of wireless communication technology in the realization of adaptive FFT processor [J] , Mobile and communication, 2009. 10: 25-29.
Google Scholar
[4]
FanJin, JinShengzhen, SunCaihong. Super high-speed FFT processor design and Implementation [J] . Optics and precision engineering, 2009. 17 (9): 2241-2246.
Google Scholar
[5]
HuangNing, ZhuEn, RongYu. High speed FFT chip design and structure research [J]. electronic device , 2008, 31(2): 511-515.
Google Scholar
[6]
ZHANG X X, WANG G Z. Parallel FFT architecture consisting of FFT chips[J]. Joumal of Circuits and Systems, 2000, 5(2): 38-42.
Google Scholar
[7]
LiQuanli, LiuChangliang. CCS FFT arithmetic [J]. Communication and information processing, 2009, 28 (2): 59-62.
Google Scholar
[8]
M.C. McFarland, A.C. Parker, R. Camposano. The High. Level Synthesis of Digital System. Proceedings of the IEEE, 1990, 78(2): 301~317.
Google Scholar
[9]
LiDuo, HuangYizhuang. Application of FPGA technology for FFT. Electronic products in the world, 2000, (8): 58~58.
Google Scholar
[10]
HanZeyao, HanYan, ZhengWeimin. A high speed real-time and fixed-point H processor design [J]. Journal of circuits and systems, 2002, 3(7): 18-22.
Google Scholar