Integral Type Multi-Ramp for Single-Slope ADC

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Abstract:

This paper presents a integral type Multi-ramp architecture apply to MRSS ADC (Multiple-ramp single-slope ADC).On the one hand to improve the capacitance mismatch by change voltage reference, On the other hand to reduced the power consumption greatly. Implemented in the GSMC 180nm 2P4M CMOS process, in the power supply voltage of 1.8 V, 11-bit resolution, 10 MHZ sampling frequency, the result of max power consumption is 1.33mW of single unit .The DNL < 0.1LSB and max INL < 0.49LSB .The Multi-ramp achieved requirements for high speed and high accuracy MRSS ADC.

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1908-1912

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February 2013

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© 2013 Trans Tech Publications Ltd. All Rights Reserved

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