High-Speed Data Acquisition System Based on FPGA in Missile-Borne Test System

Abstract:

In this paper, a high-speed data acquisition system based on FPGA is introduced, which has three different channels with one 5Msps sampling rate and 3×256Mb NAND FLASH. This system is controlled by a large scale FPGA chip from Xilinx Inc., XC3S500E-4FG320C. The collected data are first stored in nonvolatile flash on this fuse in-orbit and imported into a USB disk after down-falling. The main hardware and software design of each module are introduced in detail. Experiment results are shown in the final chapter.

• Periodical: Applied Mechanics and Materials (Volumes 333-335)
• Pages: 452-459
• DOI: https://doi.org/10.4028/www.scientific.net/AMM.333-335.452
• Online since: July 2013
• Authors: Ming Yu Zhou, Xuan Zhou, Guang Yu Zheng, Shu Sheng Peng
• Keywords: Field-Programmable Gate Array (FPGA), High-Speed Data Acquisition System, NAND Flash, USB

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