Design and Implementation of Dual-Mode Correlator IP Based on SoC

Abstract:

The SoC design is a tendency which the navigation and positioning receiver circuit design, its key technologies, including bus architecture technology, IP core design and multiplexing, in which the correlator IP core design and reuse is crucial for navigation and positioning receiver. This paper describes the operating principles and structures of the SoC bus architecture and navigation-positioning correlator, and the various modules of the correlator and the Galileo/GPS navigation signal are analyzed; On this basis, to design Galileo/GPS dual-mode correlator IP core using SoC-based IP core design method, and to simulate and analyse, it can be easily applied to the navigation and positioning receiver baseband SoC design.

• Periodical: Applied Mechanics and Materials (Volumes 336-338)
• Pages: 1761-1764
• DOI: https://doi.org/10.4028/www.scientific.net/AMM.336-338.1761
• Online since: July 2013
• Authors: Ke Ming Du, Bin Li, Ya Nan Xing
• Keywords: BUS, Dual-Mode Correlator, IP, SoC, System Integration

References

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