Evolving Fault Tolerant System Based on FPGA

Jia Nan Lou; Yang Li

doi:10.4028/www.scientific.net/AMM.341-342.819

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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vols. 341-342Evolving Fault Tolerant System Based on FPGA

Evolving Fault Tolerant System Based on FPGA

Abstract:

In order to overcome the single event function interrupt and SA failure, this paper proposes and implements a new way to design circuit, i.e. dynamically reconfigurable adaptive circuit design method. We load a Microblaze which is a soft CPU in FPGA as a motion control part of the circuit, as well as use some place of FPGA as evolution pool to find target circuit. Microblaze known input and the corresponding output applies genetic algorithm to search evolution pool. Depend on it, we successfully design and implement a DC Motor control system, besides, we carry out theoretical analysis on this circuit reliability and simulate circuit function repair test of SA fault, the result demonstrates that compared with the traditional circuit, this circuit and has a high reliability.

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Periodical:

Applied Mechanics and Materials (Volumes 341-342)

Pages:

819-823

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.341-342.819

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Online since:

July 2013

Authors:

Jia Nan Lou, Yang Li

Keywords:

Evolvable Hardware, Fault Tolerant, SA Fault

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