Design of a Low-Voltage Low-Power CMOS Operational Amplifier

Abstract:

A low voltage, low power two-stage operational amplifier (op-amp) was proposed in this paper. A folded-cascode structure is used in the input stage of the amplifier to get high gain. Current mirrors are used in the input stage to make the transconduotance constant. A simple push-pull common source amplifier is adopted as the output stage to take the advantages of its high efficiency. The experimental results show that the unity-gain bandwidth is 12.5MHz, the low-frequency open-loop voltage gain is 100dB,the phase margin is 65°, and power dissipation is 98.8μw.

• Periodical: Applied Mechanics and Materials (Volumes 380-384)
• Pages: 3283-3286
• DOI: https://doi.org/10.4028/www.scientific.net/AMM.380-384.3283
• Online since: August 2013
• Authors: Lin Hai Cui, Rui Xu, Zhan Peng Jiang, Chang Chun Dong
• Keywords: CMOS Op-Amp, Folded-Cascode, Low Power, Low Voltage

References

[1] D. Shahrjerdi, B. Hekmatshoar, M. Talaie and O. Shoaci: ICM 2003, Cairo, Egypt. p.207.

[2] K. Nagaraj, T. R. Viswanathan, K. Singhal, and J. Vlach, IEEE Trans. Circ. sys., vol. 34, (1987), p.571.

[3] A. E. Hashim, and R. L. Geiger, IEEE Inl. Symp Circ. sys. vol. 2(2002), p.11823.

[4] B. J. Hosticka, IEEE J Solid. St. Circ., Vol. 14(1979), p.1111.

[5] K. Bult and G. J. G. M. Geelen, IEEE JL. of Solid state circuits, Vol. 25, (1990), p.1379.

[6] K. Bult: Basic CMOS circuit techniques(McGraw-Hill, American, 1994).

[7] B. Davari, R. Dennard, and G. Shahidi, Proc. IEEE, Vol. 83(1995), p.595.