Applied Mechanics and Materials Vols. 433-435

Abstract: To solve the system overloading problem of sip protocol based on centralized monitoring and management system, we propose a new protocol system based on cross-regional stratification sip monitoring integrated management platform, it uses the automatic control technology, networking and communications technology, video / audio compression and transmission technology, sensors and integrated control technology and software engineering techniques. It is an integrated platform of biometrics, intelligent video analysis, anti-theft alarm techniques, 3G video management, valuables management, multifunction video and voice network, multimedia video services, and that it can be used with existing IP network, LAN, internet, 3G network, the telephone network. It is fully compatible and can be used with existing databases, monitoring systems, television networks for docking to achieve a variety of monitoring elements of centralized management, control and interaction. The innovative applications of CSS regional stratification mechanisms, ActiveX terminal buffering mechanism and VM resource allocation mechanism can provide users real-time information. And according to a variety of real-time information, it aggregated emergency solutions of the overall regional security or certain high-risk target key places of security.

Abstract: The GCC is an auto-vectorization compiler across iterations of loops to parallelism data. Turning GCC compiler optimizations flags for auto-vectorization is a way to improve the performance ability, which is a popular approach to speed up program performance. However, there are many options in GCC compiler and selecting the best combination of these options to improve program performance through vectorization is non-trivial ( as the search space is very large ).In this work we focus on the selection of compiler transformations to auto-vectorize loops with conditional statements. The selection of compiler transformations is based on the correlation between program features, speed-up, and the analysis of the code generated and a small number of passes of iterative compilation. Our preliminary experimental results show that proposed technique attains performance improvements the best ~ 6x using loops in the TSVC benchmark suite on the state-of-the-art Intel Core i3 processor.

Abstract: The problem that remained unsolved is that the real status of the equipment can not be collected in real time and it results the different statuses between the equipment and the equipment management information system (EMIS). The problem can be solved through the application of the Internet of things. A wireless sensor network was established to monitor the equipment status on the shop floor in real time. It was managed by a management server. The management server was connected to the Intranet of the company to communicate with the EMIS. In this way an Internet of things was formed to ensure synchronous status information transmission between the equipment and the EMIS. This system has been used in a large-scale vehicle manufacturing plant. The significant efforts have been made.

Abstract: Color bar signal generator is one of the most important measurements for PAL TV applications. However, its use in resource constrained applications such as color TV video adjustment is limited because of the high architecture complexity involved. Due to the broad range of applications presently offered by FPGA (filed programmable gate array), their use has become increasingly widespread in different areas and sectors. In this paper, we present the design and implementation of a color bar signal generator based on FPGA and MC1377 with a high performance and low system complexity. The FPGA technology proved to be a proper platform to meet these two contrasting requirements. The signal structure, generation principle, and FPGA implementation of composite PAL synchronize signal and RGB color signal are described. The interface circuits, hardware and software of the system are introduced. The software is simulated using MAXplusII platform. Simulation results indicate the effectiveness and stability of the signal generator.

Abstract: This paper presents an digital microwave oscillator which employs a phase lock loop (PLL) chip and a direct digital synthesizer (DDS) chips to realize a pure frequency at 3.417GHz (half of the ⁸⁷Rb atom ground-state hyperfine transition frequency) for the coherent population trapping (CPT) atomic clock application. And at this frequency, the oscillator demonstrates low noise (lower than-50dBc/Hz@100Hz and lower than-55dBc/Hz@1kHz) and purity. Moreover, based on the communication between a computer and the MCU, this oscillator could be completely controlled by self-developed user interface.

Abstract: Some problems existed in IEEE 1394a camera of the Trouble of Moving Freight Car Detection System (TFDS), such as easy disconnection with electromagnetic interference, limited image resolution and low frame rate. To improve that, a GigE camera is used as a replacement. Images of GigE camera are acquired and processed using embedded system based on FPGA and DSP. First gray images are acquired and compressed by JPEG. Then compressed data is saved on hard disk and uploaded to the server in detecting center simultaneously. System construction is greatly simplified ,meanwhile the costs, volume and power consumption are also decreased. The system has worked with a stable status for a long period in the actual railway. The final tests demonstrate that the design is feasible of great application potential.

Abstract: The effectiveness of the focusing electric area would make influence on resolutions of the device immediately, which made its parameters important. The purpose of simulation in this article was providing valuable reference for the future mechanical processing. Keys to the parameters of a focusing electric area were voltages and the inner diameters of the electrodes. Firstly we estimated the parameters relying on the fact that ions abided by the law of energy conservation through the electric area. Secondly we used the software simion to turn 3D figures of electrodes to an available model, then flied the ions. In the end a group of parameters were obtained. We simulated ions that shared the same mass number 30000Da and initial kinetic energies were an arithmetic progression with 5eV as common difference. The variance of flight time of the groups with delayed extraction was 0.0177,while the groups without delayed extraction was 0.0618.

Abstract: Most simple digital clocks use a push button to increment time reading for time adjustment. It is often time consuming. This paper suggests adding a four-by-four keypad to adjust each single time digit. The required valid 4x4 keypad key set for each time digit is predefined in the circuit design. Pressing a prohibited key would neither generate any function nor affect the operation of the digital clock. The system prototype circuit design was based on Verilog hardware description language and implemented on an EVS6 Boardan FPGA lab board. With the proposed design, adjusting time on a digital clock is quick and easy.

Abstract: The paper introduces an Intelligent Terminal which is based on the embedded technology to address the low degree of integration and intelligence of the current Health Collection Information Terminal. The new terminal adopts the design of the structure and function integrating method to integrate six health parameter measuring functions in one suit, including Electrocardiogram (ECG), Respiratory Rate, Blood Oxygen, Body Temperature, Blood Pressure and Pulse) , which is easy to carry. The additional interpersonal interfaces like storage, printer, monitor, communication and Radio Frequency Identification (RFID) enhance the new terminals intelligence degree. It could be widely applied in the situations of hospital, community, disaster relief and military.

Abstract: Distributed computer interlocking system moves the trackside execution unit of indoor close to the controlled device,it realizes the distributed control through the security communication module. The article describes overall structure of the system and four-wire switch control modules main functions in all modules as well as the hardware structure introduced. The control circuit of switch and the indication acquisition circuit are mainly analyzed. In order to improve the reliability of system,the module uses the working pattern of dual system hot spare . In this paper,operating principle of dual system hot spare and hot standby switching circuit have been mainly illustrated and described Key words: Switch control module; Fail-safe; Dual module hot spare; Computer interlocking system; Distributed control