Development of Varied CMOS Ring Oscillator Topologies in 0.13-μm CMOS Technology

Sohiful Anuar Zainol Murad; Rizalafande Ismail; Mohamad Shahimin Mukhzeer; Ahmad Mohd Fairus; Sapawi Rohana

doi:10.4028/www.scientific.net/AMM.446-447.882

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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vols. 446-447Development of Varied CMOS Ring Oscillator...

Development of Varied CMOS Ring Oscillator Topologies in 0.13-μm CMOS Technology

Abstract:

This paper presents varied CMOS ring oscillator topologies using Silterra 0.13-µm Process. Three topologies of ring oscillators have been designed which is the single-ended ring oscillator, differential ring oscillator and ring oscillator based variable resistor for 2.4 GHz wireless applications. The proposed designs consist of five stages delay cell. The simulation results show that a single-ended ring oscillator obtained the lowest power consumption of 0.41 mW, while differential oscillator achieves phase noise of −64.44 dBc/Hz at 1 MHz offset frequency. However, ring oscillator based variable resistor did not achieve any significant improvement. The proposed design is oscillates at 2.4 GHz.

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Periodical:

Applied Mechanics and Materials (Volumes 446-447)

Pages:

882-886

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.446-447.882

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Online since:

November 2013

Authors:

Sohiful Anuar Zainol Murad, Rizalafande Ismail, Mohamad Shahimin Mukhzeer, Ahmad Mohd Fairus, Sapawi Rohana

Keywords:

Delay Cell, Phase Noise, Ring Oscillator, Variable Resistor

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