Design and Implementation of USB Transceiver with Verilog

Li Kun Zheng; Ya Li Chen; Zhe Ying Li

doi:10.4028/www.scientific.net/AMM.462-463.604

Paper Titles

Package Chip Defect Reduction on Integrated Circuit
p.578

Transient Simulation of Lightning Wave on Transmission Line
p.585

Design and Thermal Analysis of SiGe HBT with Segmented Emitter Fingers and Non-Uniform Emitter Finger Spacing
p.592

High Birefringent Terahertz Photonic Crystal Fiber Based on Material-Filled Structure
p.599

Design and Implementation of USB Transceiver with Verilog
p.604

A High-Accuracy and Robust Low Drop-Out Regulator for Outdoor Decorative Lighting LED Driver
p.609

A Realization Method for Multi-Carrier MPPSK Modulations
p.615

Design of FIR Digital Filter Based on CSD Code
p.619

Design and Realization of the Small Power Two-Way DC Power Supply Based on UCC2800
p.623

HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vols. 462-463Design and Implementation of USB Transceiver with...

Design and Implementation of USB Transceiver with Verilog

Abstract:

The Universal Serial Bus Transceiver is one of the important functional blocks of USB controller, which can transmit and receive data to or from USB devices. In this paper, USB Transceiver is designed and implemented with Verilog HDL, This includes functions such as, data serialization, bit stuffing, NRZI encoding and NRZI decoding, bit destuffing, deserialization. The transceiver is simulated by the modelsim software and the simulation wave is gave.

You might also be interested in these eBooks

View Preview

Info:

Periodical:

Applied Mechanics and Materials (Volumes 462-463)

Pages:

604-608

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.462-463.604

Citation:

Cite this paper

Online since:

November 2013

Authors:

Li Kun Zheng*, Ya Li Chen, Zhe Ying Li

Keywords:

Universal Serial Bus, USB Transceiver Macrocell Interface, Verilog HDL

Export:

RIS, BibTeX

Price:

Permissions CCC:

Request Permissions

Permissions PLS:

Request Permissions

Сopyright:

Citation:

* - Corresponding Author

References

[1] Jang-Jin Nam, Yong-Jun Kim, Kwang-Hee Choi, Hong-June Park A UTMI-compatible physical-layer USB2. 0 transceiver chip Soc Conference, 2003. Proceedings. IEEE International [Systems-on-Chip] 2003 P309~P312.

DOI: 10.1109/soc.2003.1241532

Google Scholar

[2] USB 2. 0 Specification, April 27, (2000).

Google Scholar

[3] USB 2. 0 Transceiver Macrocell Interface (UTMI) Specification, version 1. 05, March 29, (2001).

Google Scholar

[4] A. Vamshidhar Reddy et al, Implementation of USB Transceiver Macrocell Interface, IJRET | Nov 2012, Available http: /www. ijret. org.

Google Scholar

[5] Babulu, K. Rajan, K.S. FPGA Implementation of USB Transceiver Macrocell Interface with USB2. 0 Specifications．Emerging Trends in Engineering and Technology, 2008．ICETET 08．First International Conference on 16-18 July 2008. 966. 970.

DOI: 10.1109/icetet.2008.77

Google Scholar