A Capacitive Humidity Sensor for Low-Cost Low-Power Application

Abstract:

This paper presents a capacitive humidity sensor in CMOS technology. The humidity sensor element is implemented in standard CMOS technology without any further post-processing, which results in low fabrication cost. The sensor interface employs a fully-digital architecture based on phase locked loop, which results in low pow dissipation. The proposed humidity sensor is fabricated in TSMC 0.18μm CMOS process and the chip occupies an area of 0.05mm². The measurement result shows that the sensor value exhibits good linearity within the range of 10-90%RH and the interface circuit consumes only 1.05μW at 0.5V supply voltage.

• Periodical: Applied Mechanics and Materials (Volumes 556-562)
• Pages: 1847-1851
• DOI: https://doi.org/10.4028/www.scientific.net/AMM.556-562.1847
• Online since: May 2014
• Authors: Xiang Wu*, Fang Ming Deng
• Keywords: Capacitive Humidity Sensor, CMOS Technology, Phase Locked Loop, Sensor Interface

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