An Evaluation Eye Diagram of a High-Reliability FPGA Platform for High-Resolution Camera

Abstract:

The FPGA platform is a developing area in the industry applications. With continuous advancement in science and technology, the image quality has entered an era of full-HD. Its resolution reaches 1920x1080 pixels, and its refresh rate comes to 60 fps (Frames Per Second). Taking the 1920x1080 P, 60 fps image sensor as an example, the eye diagram efficacy at both the image input end and the output end were measured. When the input signal was LVDS, the standard value of the eye width and height was 1.092 ns and 100mV respectively. The measured value was 1.297 ns and 149 mV respectively, which are 18% and 49% better than the standard value, respectively. When the output signal was HDMI, the standard [1] of the eye diagram was 424 ps and 400 mV respectively. The measured value was about 540 ps and 600 mV respectively, which are 27% and 50% better than the standard value, respectively. The results of measurement of the electrical characteristics of the system above show that our high-resolution image processing system platform has high reliability.

• Periodical: Applied Mechanics and Materials (Volumes 764-765)
• Pages: 1270-1274
• DOI: https://doi.org/10.4028/www.scientific.net/AMM.764-765.1270
• Online since: May 2015
• Authors: Hung Li Tseng, Wen Tzeng Huang, Jian Cheng Dai, Chin Hsing Chen*, Sun Yen Tan
• Keywords: CCD Sensor, FPGA, HDMI, High Resolution, LVDS

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