An Encoder Used in an Ultra High-Speed Folding and Interpolating ADC

Yu Han Gao; Ru Zhang Li; Dong Bing Fu; Yong Lu Wang; Zheng Ping Zhang

doi:10.4028/www.scientific.net/AMR.1049-1050.687

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HomeAdvanced Materials ResearchAdvanced Materials Research Vols. 1049-1050An Encoder Used in an Ultra High-Speed Folding and...

An Encoder Used in an Ultra High-Speed Folding and Interpolating ADC

Abstract:

High speed encoder is the key element of high speed analog-to-digital converter (ADC). Therefor the type of encoder, the type of code, bubble error suppression and bit synchronization must be taken into careful consideration especially for folding and interpolating ADC. To reduce the bubble error which may resulted from the circuit niose, comparator metastability and other interference, the output of quantizer is first encoded with gray code and then converted to binary code. This high speed encoder is verified in the whole time-interleaved ADC with 0.18 Bi-CMOS technology, the whole ADC can achieve a SNR of 45 dB at the sampling rate of 5GHz and input frequency of 495MHz, meanwhile a bit error rate (BER) of less than 10^-16 is ensured by this design.

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Periodical:

Advanced Materials Research (Volumes 1049-1050)

Pages:

687-690

DOI:

https://doi.org/10.4028/www.scientific.net/AMR.1049-1050.687

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Online since:

October 2014

Authors:

Yu Han Gao*, Ru Zhang Li, Dong Bing Fu, Yong Lu Wang, Zheng Ping Zhang

Keywords:

BER, Bubble Error, Folding ADC, High Speed Encoder, Interpolating ADC, SNR

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* - Corresponding Author

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