I2C-Bus Design Based on FPGA

Da Cao; Shun Xiang Wu; Long Jiang Su

doi:10.4028/www.scientific.net/AMR.179-180.528

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HomeAdvanced Materials ResearchAdvanced Materials Research Vols. 179-180I2C-Bus Design Based on FPGA

I²C-Bus Design Based on FPGA

Abstract:

Introduced field programmable gate array FPGA with I2C bus interface device interface design. Programming with VHDL, using general FPGA I/O port to generate I2C bus interface signal timing, achieved FPGA with I2C-bus devices data communication, went through the simulation test, given the application example of FPGA with I2C-bus EEPROOM chip AT24C02 connected hardware design.

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Periodical:

Advanced Materials Research (Volumes 179-180)

Pages:

528-533

DOI:

https://doi.org/10.4028/www.scientific.net/AMR.179-180.528

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Online since:

January 2011

Authors:

Da Cao, Shun Xiang Wu, Long Jiang Su

Keywords:

AT24C02, Field-Programmable Gate Array (FPGA), I²C-Bus, Very High Speed Integrate Circuit Hardware Description Language (VHDL)

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