Design of Reconfigurable FIR Filter System Based on FPGA

Abstract:

In order to improve the real-time and flexible of FIR digital filter, a reconfigurable FIR filter system based on FPGA is designed. According to the filter specialties, the filter coefficients are calculated by the computer. And the configured coefficients of the multistage FIR filter are downloaded to the chip. The filtering computing is completed by the FPGA. The filtered data is transmitted to the computer through the USB2.0 interface for further processing, such as displaying, analyzing and storing. The states conversion between coefficients configuring mode and filtering mode is finished by FSM (Finite State Machine), which ensures the system to work orderly. The experimental results demonstrated that the coefficients configuring of the system is easy, which can adjust the filter coefficients flexibly according to the actual demand, and the filter is effective，that it can effectively filter out the noise signals.

• Periodical: Advanced Materials Research (Volumes 433-440)
• Pages: 4669-4674
• DOI: https://doi.org/10.4028/www.scientific.net/AMR.433-440.4669
• Online since: January 2012
• Authors: Guo Sheng Xu
• Keywords: Field-Programmable Gate Array (FPGA), Finite Impulse Response Digital Filter, Reconfigurable Coefficient, USB2.0

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