Memory Devices Based on the Nanoparticle Silicon Floating Gate Double-Barrier Structure

Zhao Jun Guo; Li Qiang Guo; Guo Dong Wu

doi:10.4028/www.scientific.net/AMR.773.664

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HomeAdvanced Materials ResearchAdvanced Materials Research Vol. 773Memory Devices Based on the Nanoparticle Silicon...

Memory Devices Based on the Nanoparticle Silicon Floating Gate Double-Barrier Structure

Abstract:

Thin film transistors with nanoparticles silicon floating-gate are fabricated by plasma enhanced chemical vapor deposition. It should be noted that SiO₂acts as both a tunneling and a blocking layer. Meanwhile, some np-Si dots are embedded within SiO₂layers. The electrical characteristic of the devices are measured by semiconductor parameter analyzer at room temperature. These Thin film transistors show a good device performance with a high charge-carrier mobility of 33 cm²/vs and a large on/off ratio of 1.2×10⁶. Moreover, the capability of written and erasing was demonstrated. This indicates that thin film transistors can be operated as rewritable nonvolatile floating gate memory devices.

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Periodical:

Advanced Materials Research (Volume 773)

Pages:

664-667

DOI:

https://doi.org/10.4028/www.scientific.net/AMR.773.664

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Online since:

September 2013

Authors:

Zhao Jun Guo, Li Qiang Guo, Guo Dong Wu

Keywords:

Double-Barrier Structure, Floating Gate, Memory Devices, Nanoparticle Silicon

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