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Multistage Amplifier Using Dual-Miller with Nulling-Resistor and Dual-Feedforward Structure
Abstract:
This paper designs a high-gain wide-bandwidth multistage amplifier by employing the dual-miller compensation with nulling-resistor and dual-feedforward compensation (DMCNR-DFC) in 0.35μm BCD process. The designed DMCNR-DFC multistage amplifier achieves well performance including gain-bandwidth product (GBW) and slew rate (SR). Simulation results show that the DMCNR-DFC multistage amplifier achieves a dc gain of about 121.1dB and GBW of about 6.1MHz with 52o phase margin.
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Pages:
1169-1172
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Online since:
July 2014
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© 2014 Trans Tech Publications Ltd. All Rights Reserved
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