Computerized Simulation of Board-Level EMC in High-Speed PCB

Abstract:

Aim at the multi-faceted nature and universality of the EMC problems in high-speed PCB, based on a three-line coupling model and considering the influence of via holes caused, board-level EMC problems of PCB were researched on point for point. In this paper, the research and simulation were launched by a kind of software named Hyperlynx, and a 6-layer PCB model was built and used. Our Research was focused on the EMC problems existed in hierarchy and layer medium. On the basis of the simulation results, and combined with previous experience in the PCB design, some effective measures for improving EMC in high-speed PCB design were summarized, which could be taken as a clearly reference in design of high-speed PCB.

• Periodical: Advanced Materials Research (Volumes 989-994)
• Pages: 1977-1980
• DOI: https://doi.org/10.4028/www.scientific.net/AMR.989-994.1977
• Online since: July 2014
• Authors: Xian Zhe Wu*, Cheng Zhang, Shuang Fei Yang, Lian Qing Zhao
• Keywords: Board-Level EMC, High-Speed PCB, Three-Line Coupling Model, Via Holes

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