The Review of Cache Partitioning in Multi-Core Processor

Abstract:

With the development of microelectronics technology, Chip Multi-Processor (CMP) or multi-core design has become a mainstream choice for major microprocessor vendors. But in a chip-multiprocessor with a shared cache structure , the competing accesses from different applications degrade the system performance , resulting in non-optimal performance and non-predicting executing time. Cache partitioning techniques can exclusively partition the shared cache among multiple competing applications. In this paper, we first introduce the problems caused by Cache pollution in multicore processor structure; then present the different methods of Cache partitioning in multicore processor structure¬ －－categorizing them based on the different metrics. And finally, we discuss some possible directions for future research in the area.

• Periodical: Key Engineering Materials (Volumes 439-440)
• Pages: 1223-1229
• DOI: https://doi.org/10.4028/www.scientific.net/KEM.439-440.1223
• Online since: June 2010
• Authors: Shuo Li, Gao Chao Xu, Yu Shuang Dong, Feng Wu
• Keywords: Cache, IPC, Miss Rate Monitor, Multi-Core, Quality of Service (QoS)

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