High-Speed Multiple-Valued Data Transmission Based on Time-Domain Pre-Emphasis Techniques

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This paper describes a Pulse-Width Modulation (PWM) pre-emphasis technique which utilizes time-domain information processing to increase the data rate for a given bandwidth of interconnection. The PWM pre-emphasis method does not change the pulse amplitude as for conventional FIR pre-emphasis, but instead exploits timing resolution. This fits well with recent CMOS technology trends toward higher switching speeds and lower voltage headroom. We discuss multiple-valued data transmission based on time-domain pre-emphasis techniques in consideration of higher-order channel effects.

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260-270

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December 2010

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© 2011 Trans Tech Publications Ltd. All Rights Reserved

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[1] M. Kameyama, T. Hanyu and T. Aoki: Multiple-valued logic as a new computing paradigm - A brief survey of Higuchi's research on multiple-valued logic, Journal of Multiple-Valued Logic and Soft Computing, Vol. 11, pp.407-436 (2005).

DOI: 10.1109/ismvl.2003.1201407

Google Scholar

[2] Y. Yuminaka: Intra/inter-chip CDMA communications for efficient data transmission towards new paradigm of computing, Journal of Multiple-Valued Logic and Soft Computing, Vol. 11, pp.603-618 (2005).

Google Scholar

[3] Y. Yuminaka and K. Yamamura: Equalization techniques for multiple-valued data transmission and their application, Journal of Multiple-Valued Logic and Soft Computing, Vol. 13, pp.569-582 (2007).

DOI: 10.1109/ismvl.2007.17

Google Scholar

[4] H. Higashi, S. Masaki, M. Kibune, S. Matsubara, T. Chiba, Y. Doi, H. Yamaguchi, H. Takauchi, H. Ishida, K. Gotoh and H. Tamura: 5-6. 4 Gbps 12 channel transceiver with pre-emphasis and equalizer, Symposium on VLSI circuits, pp.130-133 (2004).

DOI: 10.1109/vlsic.2004.1346533

Google Scholar

[5] J. Schrader, E. Klumperink, J. Visschers and B. Nauta: CMOS transmitter using pulse-width modulation pre-emphasis achieving 33 dB loss compensation at 5-Gb/s, Symposium on VLSI Circuits, pp.388-391 (2005).

DOI: 10.1109/vlsic.2005.1469411

Google Scholar

[6] D. Schinkel, E. Mensink, E. Klumperink, A. Tuijl and B. Nauta: A 3 Gb/s/ch transceiver for RC-limited on-chip interconnects, International Solid-State Circuits Conference, pp.386-387 (2005).

DOI: 10.1109/isscc.2005.1494031

Google Scholar

[7] Y. Yuminaka and Y. Takahashi: Time-domain pre-emphasis techniques for equalization of multiple-valued data, Proc. 38th Int. Symp. Multiple-Valued Logic, pp.20-25 (2008).

DOI: 10.1109/ismvl.2008.40

Google Scholar

[8] B. Razavi: RF microelectronics, Prentice Hall (1998).

Google Scholar

[9] H. Cheng, A. Chan Carusone: A 32/16 Gb/s 4/2-PAM transmitter with PWM pre-emphasis and 1. 2 Vpp per side output swing in 0. 13-mm CMOS, Custom Integrated Circuits Conference, 20-5 (2008).

DOI: 10.1109/cicc.2008.4672165

Google Scholar