Evaluation of Interface Traps Type, Energy Level and Density of SiC MOSFETs by Means of C-V Curves TCAD Simulations

Ilaria Matacena; Luca Maresca; Michele Riccio; Andrea Irace; Giovanni Breglio; Santolo Daliento

doi:10.4028/www.scientific.net/MSF.1004.608

Paper Titles

Low-Energy Muons as a Tool for a Depth-Resolved Analysis of the SiO₂/4H-SiC Interface
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Profiling with Depth Resolution of Sub-nm for SiO₂/ SiC Interface by Dual-Beam TOF-SIMS Combined with Simulation
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Monitoring on Creation and Annihilation of Interface Trap Levels with NO Oxidation, Re-Oxidation and N₂ Annealing with Conductance Measurements
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Photo-Assisted Corona-Charge Characterization of Wide Bandgap Interfaces with Deep Traps Invisible in Standard C-V
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Evaluation of Interface Traps Type, Energy Level and Density of SiC MOSFETs by Means of C-V Curves TCAD Simulations
p.608

Gate Capacitance and Conductance-Voltage Characteristics of Vertical 4H-SiC MOSFETs
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Insight into Channel Conduction Mechanisms of 4H-SiC(0001) MOSFET Based on Temperature-Dependent Hall Effect Measurement
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Influence of Non-Uniform Interface Defect Clustering on Field-Effect Mobility in SiC MOSFETs Investigated by Local Deep Level Transient Spectroscopy and Device Simulation
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A Comparison of Active Near-Interface Traps in Nitrided and As-Grown Gate Oxides by the Direct Measurement Technique
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HomeMaterials Science ForumMaterials Science Forum Vol. 1004Evaluation of Interface Traps Type, Energy Level...

Evaluation of Interface Traps Type, Energy Level and Density of SiC MOSFETs by Means of C-V Curves TCAD Simulations

Abstract:

SiC MOSFETs are promising devices for many power applications. They are replacing Si devices due to the higher performance of SiC material. However, there are some technological issues still unsolved. One of the main problems is the high density of traps at the SiC/SiO₂ interface. Traps distribution at such interface is complex and it affects the overall performance of the device. Traps influence both current-voltage and capacitance-voltage characteristics of a SiC MOSFET. The aim of this work is the study of interface traps effects on C-V and I-V curves for a 1200 V SiC MOSFET. The numerical study is adopted to explain the shape of experimental C-V curves of commercial devices.

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Materials Science Forum (Volume 1004)

Pages:

608-613

DOI:

https://doi.org/10.4028/www.scientific.net/MSF.1004.608

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Online since:

July 2020

Authors:

Ilaria Matacena*, Luca Maresca, Michele Riccio, Andrea Irace, Giovanni Breglio, Santolo Daliento

Keywords:

C-V Measurements, Interface Traps, MOSFET, TCAD Simulation

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