Materials Science Forum
Vol. 1098
Vol. 1098
Materials Science Forum
Vol. 1097
Vol. 1097
Materials Science Forum
Vol. 1096
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Materials Science Forum
Vol. 1095
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Materials Science Forum
Vol. 1094
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Materials Science Forum
Vol. 1093
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Materials Science Forum
Vol. 1092
Vol. 1092
Materials Science Forum
Vol. 1091
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Materials Science Forum
Vol. 1090
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Materials Science Forum
Vol. 1089
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Materials Science Forum
Vol. 1088
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Materials Science Forum
Vol. 1087
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Materials Science Forum
Vol. 1086
Vol. 1086
Materials Science Forum Vol. 1092
Paper Title Page
Abstract: The demand is rapidly increasing for SiC MOSFETs and diodes for power electronic conversion semiconductor (PECS) applications such as electrified vehicle charging and traction, energy storage systems and industrial power supplies. These applications employ a high quantity of large-area die per system while demanding high system-level reliability under aggressive electrical and environmental operating conditions. In addition, SiC devices exhibit some failure mechanisms that are less severe than, or non-existent, in Si devices. This situation demands thorough and novel device reliability characterization and quantification. It is also driving the development of industry consortia standards and guidelines at a much faster rate, and relatively earlier in the technology maturation phase, than occurred in the Si industry. In this paper, I will review some of the key published reliability performance data, stress procedure methodologies used, and implications for key applications. I will also compare and contrast the existing guideline and standard documents and suggest directions that are being explored for future documents. I will also discuss how future guidelines and standards are being developed to cover the SiC-specific failure mechanisms for representative mission profiles for some key applications, particularly electrified vehicles.
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Abstract: In this work, the impact of 200 MeV proton irradiation at a fluence of 6 × 1012 cm−2 on the forward characteristics and the breakdown behaviour of nickel (Ni) and titanium (Ti) Schottky barrier diodes is explored. An improvement in the ideality factor, reduction in the threshold voltage, and an increase in the breakdown voltage is observed post irradiation. Point defects induced by the irradiation are likely responsible for the observed effects. Deep Level transient Spectroscopy (DLTS) measurements were performed on the irradiated Schottky diodes to analyse the defects created during the irradiation and gauge their potential role in changing the diode behavior. The defects induced by the high-energy protons were compared to those formed by low-energy proton irradiation at 1.8 MeV to a fluence of 1 × 1012 cm−2. Finally, consecutive DLTS measurements were performed after a series of reverse bias anneals at low temperatures from 350-700 K to explore the annealing behaviour of the defects induced by the proton irradiations.
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Abstract: In this work a reliability study of SiC power MOSFETs working as switching elements in a DC-DC Boost converter circuit is discussed. A critical parameter for a high-performance operation is the stable characteristics of the transistors employed. However, charge trapping effects such as bias temperature instabilities can affect e.g. the threshold voltage of transistors and thus lead to a variation in circuit behavior and efficiency. Furthermore, a time-dependent drift of the threshold voltage (ΔVth) of the MOSFET over time can cause an increase of the on-resistance (RDS(ON)) too, and thus affect the static on-state power losses accordingly (PON). In this work, we use our physical reliability simulator Comphy to extract the threshold voltage drift of the transistor over time for various mission profiles for gate biases under device operation. Using the extracted ΔVth values from the simulator, we can reproduce the measured behavior of the DC-DC boost converter circuit. With the calibrated toolset, we can obtain the ΔVth values over a long operation time to predict the aged behavior of the circuit parameters employing Spice simulations, which could be beneficial for circuit design and lifetime prediction of the system.
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Abstract: The Smart CutTM technology enables the combination of a high quality single crystal SiC layer onto a low resistivity handle wafer (<5mOhm.cm), allowing device optimization as well as the reduction of device’s conduction and switching losses. On this new SmartSiCTM substrate, the sheet resistance of the back side contact after metal deposition, without anneal, is about 10x lower than the annealed back side contact on 4H-SiC. Schottky-barrier vertical structures thinned down to 250μm were prepared for power cycling tests (PCT) measurements. Up to 250 k cycles, the devices remained within the specifications of AQG324 for samples prepared from SmartSiCTM substrates. We are demonstrating here that in addition to a higher current rating (up to 20%), the SmartSiCTM substrate enables a device fabrication simplification by skipping the annealing of the back-side ohmic contact, without compromising either the back-side contact resistance or the assembly PCsec reliability.
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