Materials Science Forum Vol. 1091

Abstract: The design of robust power semiconductor devices and the assessment of their susceptibility to terrestrial cosmic rays induced failures requires the accurate characterization of the device-internal electric field. This work presents a non-invasive cryostatic spectrometry technique making use of a soft-gamma Am²⁴¹ radioactive source, to sense the device-internal electric field of silicon carbide power devices, through the measurement of the carriers’ multiplication factor. TCAD and Monte Carlo simulations tools are coupled to predict the soft-gamma irradiation spectra and to localize the hotspots for charge multiplication in the device structure. An empirical relationship is derived to convert the carriers’ multiplication factor measured at cryogenic temperature to the multiplication factor at ambient temperature. Finally, by highlighting the correlation between the multiplication factor and the failure rate of power devices exposed to terrestrial cosmic radiation, the technique is proposed as a complimentary method for the on-field assessment of the Safe-Operating Area.

Abstract: To reach the theoretical performance limit of 4HSiCMOSFETs the SiC/SiO2interfacedefects along the inversion channel need to be fully identified in order to be avoided. We employa measurement technique that allows to observe energetically resolved trap states at the SiC/SiO2 interface by measuring the electrolumiscence of a gate pulsed MOSFET. The spectra are recorded at room and cryogenic temperatures with a spectrometer and two different amplitudes of the gate pulse. Comparison of the results to literature allows for identification of the L1 line of the D1 center with an energy of 2.9 eV and suggests donoracceptorpair recombination or Z1/2 to be responsible for the emission around 2.5 eV. Ionization energies of PbC and related vacancy centers determined via ab initio calculations show similar results as the experimental data and provide a possible classification of the trap level around 1.8 eV.

Abstract: This paper presents a comparison of the density of performance-degrading near-interface traps (NITs) in the most commonly available 1200 V commercial N-channel SiC power metal–oxide–semiconductor field-effect transistors (MOSFETs). A recently developed integrated-charge technique was used to measure the density of NITs with energy levels aligned to the conduction band, which degrade MOSFET’s performance by capturing and releasing electrons from the channel biased in the strong-inversion condition. Trench MOSFETs of one manufacturer have lower densities of these NITs in comparison to MOSFETs with the planar gate structure, corresponding to observed higher channel-carrier mobility in trench MOSFETs. Different response-time distributions were also observed, corresponding to different spatial location of the measured NITs.

Abstract: In this paper, SiC MOSFETs capacitance is monitored when a DC bias is applied between Drain and Source. The arising capacitance exhibits a sharp peak in the inversion region which is related to the SiC/SiO₂ interface traps properties. Temperature effects on such peak are investigated using both experimental and numerical results. The peak shifts toward lower Gate voltage as temperature increases, in agreement with the threshold voltage reduction at higher temperature.

Abstract: In this work, we investigate the Body Diode (BD) of a 40mOhm, 1.2kV SiC MOSFETs. We performed DC measurements and switching measurements, at Room Temperature (RT) and High Temperature (HT) (T=175°C), together with TCAD simulation and calibration. In switching measurements, we focused on the low side (LS) switch turn-on event, i.e., the BD turn-off event. We demonstrated that unipolar and bipolar BD can both be achieved with different V_GS. With V_GS=-5V, BD conducts in bipolar mode with carriers being injected via pn junction. This is rather well known in literature and is well characterized by the Negative Temperature Coefficient (NTC) of BD V_F. Switching with BD V_GS=-5V show strong reverse recovery-temperature dependent that caused by the augmented minority carrier injection at high temperature. Unipolar BD is achieved by channel conduction at V_GS=0V and it is well characterized by BD V_F - Positive Temperature Coefficient (PTC). Thanks to the unipolar nature, turn-on switching with BD V_GS=0V show no reverse recovery-temperature dependent.

Abstract: Bipolar degradation is a known problem in the development of SiC MOSFETs when the body diodes (p+ body/ n-drift layer) are forward biased. Mostly higher voltage classes like the 1.7 kV or 3.3 kV SiC MOSFETs have been studied in literature resulting with significant Rdson increase [1-2]. In this work, body diode stress was conducted for 1.2kV SiC MOSFETs, which were mapped with Infra-Red photoluminescence (IR-PL) to determine and localize the exact number of BPDs present in the drift layers of each die [3, 4] and grouped by this criterion. Devices were stressed at extremely high current densities (1200 – 1700 A/cm²) under pulsed conditions. The post-stress analysis shows non-negligible increase of Rdson and Vf. Bipolar degradation occurring from stressing the body diodes at high forward current densities was confirmed by electroluminescence analysis.

Abstract: This paper focuses on reporting the switching behaviour of our Silicon Carbide (SiC) power MOSFETs, rated 3.3kV – 25A. The devices are based on a gate stack formed by SiO₂/SiN and have been tested during Inductive Load Switching (ILS) in different conditions (nominal and SOA) with different chip configurations (single/multiple dies). In this contribution, the turn–on and turn–off curves are reported, along with the extracted RBSOA and switching energies.

Abstract: SiC MOSFETs display reliability issues related to the quality of SiO₂/SiC interface and bulk material due to the presence of near interface traps and point and extended material defects [1]. These material related issues give rise to a degradation of device reliability and ruggedness. One of them are basal plane dislocations (BPDs) introduced in the drift-layer during the epitaxial growth process which causes a s.c. bipolar degradation. Growth and movement of BPDs fueled by recombination energy has a very significant impact on conduction loss and on-resistance degradation. For 3.3 kV voltage capability, the probability of the appearance of BPDs is greater because the drift region is about three times larger compared to 1.2 kV devices [2-3]. We present measurement results and analysis of bipolar degradation in 3.3 kV MOSFETs with conventional body diode and embedded schottky barrier diode (SBD). The measurements were performed applying 50 % and 80 % of rated current with duty cycle 80 %, under total time of 100 hrs at constant case temperature of 54 °C. The 3rd-quadrant performance of both types of MOSFETs in pre-stress conditions was characterized at 25 and 150 °C with different gate biases of -10 V, 0 V, and +17 V. To evaluate the bipolar degradation, the diode conduction characteristics were measured at 25 °C after different stressing times by diode conduction the MOSFET output characteristics were measured at 25 and 54 °C before and after stressing the intrinsic body diode and embedded SBD. No V_SD shift was observed in diode conduction characteristics. The results indicate that the MOSFETs were fabricated on appropriate material with a sufficiently low number basal plane dislocation (BPD). The on-state resistance with V_GS = +17 V was decreased by temperature due to increased JFET resistance rather than bipolar degradation. On the other hand, the on-state resistance with V_GS = +11 V was impacted by the increased temperature and V_TH instability.

Abstract: Bias temperature instability (BTI) in SiC MOSFETs has come under significant academic and industrial research. Threshold voltage (VTH) shift due to gate voltage stress has been demonstrated in several studies investigating gate oxide reliability in SiC MOSFETs. Results have shown positive.VTH shift occurs due to electron trapping (PBTI), and negative VTH shift occurs due to hole trapping (NBTI). In this paper, VTH shift is studied for unipolar and bipolar gate pulses with frequencies ranging from 1Hz to 100 kHz. The turn-OFF voltage for the unipolar VGS pulse is 0 V. In the case of the bipolar VGS pulses, two turn-OFF voltages are investigated, namely VGS-OFF = -3V and VGS-OFF= -5V. VTH shift is measured after 1000 seconds with recovery times in the range of 20 milliseconds, and preconditioning is performed before VTH measurement. These measurements have been performed at 25°C and 150°C on a commercially available SiC Planar MOSFET and a SiC Trench MOSFET. The results show that -3 V is enough for de-trapping sufficient electrons while -5V results in increased NBTI, which is accelerated by higher temperatures.