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HomeMaterials Science ForumMaterials Science Forum Vol. 1091SiC MOSFETs Biased C-V Curves: A Temperature...

SiC MOSFETs Biased C-V Curves: A Temperature Investigation

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Abstract:

In this paper, SiC MOSFETs capacitance is monitored when a DC bias is applied between Drain and Source. The arising capacitance exhibits a sharp peak in the inversion region which is related to the SiC/SiO₂ interface traps properties. Temperature effects on such peak are investigated using both experimental and numerical results. The peak shifts toward lower Gate voltage as temperature increases, in agreement with the threshold voltage reduction at higher temperature.

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Periodical:

Materials Science Forum (Volume 1091)

Pages:

31-36

DOI:

https://doi.org/10.4028/p-mqpk26

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Online since:

June 2023

Authors:

Ilaria Matacena*, Luca Maresca, Michele Riccio, Andrea Irace, Giovanni Breglio, Alberto Castellazzi, Santolo Daliento

Keywords:

Gate Capacitance, Interface Characterization, Peak, SiC/SiO₂ Interface

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* - Corresponding Author

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