Reliability and Standardization for SiC Power Devices

Article Preview

Abstract:

The demand is rapidly increasing for SiC MOSFETs and diodes for power electronic conversion semiconductor (PECS) applications such as electrified vehicle charging and traction, energy storage systems and industrial power supplies. These applications employ a high quantity of large-area die per system while demanding high system-level reliability under aggressive electrical and environmental operating conditions. In addition, SiC devices exhibit some failure mechanisms that are less severe than, or non-existent, in Si devices. This situation demands thorough and novel device reliability characterization and quantification. It is also driving the development of industry consortia standards and guidelines at a much faster rate, and relatively earlier in the technology maturation phase, than occurred in the Si industry. In this paper, I will review some of the key published reliability performance data, stress procedure methodologies used, and implications for key applications. I will also compare and contrast the existing guideline and standard documents and suggest directions that are being explored for future documents. I will also discuss how future guidelines and standards are being developed to cover the SiC-specific failure mechanisms for representative mission profiles for some key applications, particularly electrified vehicles.

You might also be interested in these eBooks

Info:

* - Corresponding Author

[1] J. Parker (2022) "Wolfspeed CEO: Demand for semiconductors continues to increase – here's why." WRAL TechWire. (Accessed: July 31, 2022).

Google Scholar

[2] D.J. Lichtenwalner, S. Sabri, E. Van Brunt, B. Hull, S.H. Ryu, P. Steinmann, A. Romero, J.H. Park, S. Ganguly, D.A. Gajewski, J. Richmond, S. Allen and J.W. Palmour, Accelerated Testing of SiC Power Devices under High-Field Operating Conditions, Proceedings of ICSCRM 2019, Published in Mat. Sci. Forum 1004: p.992 (2019).

DOI: 10.4028/www.scientific.net/msf.1004.992

Google Scholar

[3] T. Aichinger, G. Rescher and G. Pobegen, Threshold voltage peculiarities and bias temperature instabilities of SiC MOSFETs, Microelectronics Reliability, 80: 68-78 (2018).

DOI: 10.1016/j.microrel.2017.11.020

Google Scholar

[4] J.J. Sumakeris, P. Bergman, M. K. Das, C. Hallin, B. A. Hull, E. Janzén, H. Lendenmann, M. J. O'Loughlin, M.J. Paisley, S.Y. Ha, M. Skowronski, J.W. Palmour, C.H. Carter Jr., Techniques for Minimizing the Basal Plane Dislocation Density in SiC Epilayers to Reduce Vf Drift in SiC Bipolar Power Devices, Mat. Sci. Forum (2006), vols. 527-529, pp.141-146.

DOI: 10.4028/www.scientific.net/msf.527-529.141

Google Scholar

[5] E. Van Brunt, M. O'Loughlin, A.A. Burk, B. Hull, S.H. Ryu, J. Richmond, Y. Khlebnikov, E. Balkas, D.A. Gajewski, S. Allen and J.W. Palmour, Industrial and Body Diode Qualification of Gen-III Medium Voltage SiC MOSFETs: Challenges and Solutions, Proceedings of ECSCRM, p.805 (2018).

DOI: 10.4028/www.scientific.net/msf.963.805

Google Scholar

[6] J.H. Stathis and S. Zafar, The negative bias temperature instability in MOS devices: A review, Microelectronics Reliability 46 (2006) pp.270-286.

DOI: 10.1016/j.microrel.2005.08.001

Google Scholar

[7] D. J. Lichtenwalner, S. Sabri, E. van Brunt, B. Hull, S.-H. Ryu, P. Steinmann, A. Romero, S. Ganguly, D. A. Gajewski, S. Allen, and J. W. Palmour, Accelerated Testing of SiC Power Devices, 2020 IEEE International Integrated Reliability Workshop.

DOI: 10.1109/iirw49815.2020.9312873

Google Scholar

[8] J.McPherson, Reliability Physics and Engineering, 3rd Ed., Springer Publishing, 2019.

Google Scholar

[9] IEC document 63275-2 ED. 1.0 B:2022.

Google Scholar

[10] IEC document 63275-1 ED. 1.0 B:2022.

Google Scholar

[11] JEDEC document JEP184.

Google Scholar

[12] JEDEC document JEP183.

Google Scholar

[13] JEDEC document JEP187.

Google Scholar

[14] JEDEC document JEP190.

Google Scholar

[15] ECPE document AQG324.

Google Scholar