Via/Hole Filling by Pulse-Reverse Copper Electroplating for 3D SiP

Abstract:

Copper via filling is an important factor in 3D stacking interconnection of SiP (system in package). As the packaging density is getting higher, the size of via is getting smaller. When DC electroplating is applied, a defect-free hole cannot be obtained in a small size hole. To prevent the defects in holes, pulse and pulse reverse current was applied in copper via filling. The size of 50, 70, 100
in diameter and 100
in height. The holes were prepared by DRIE method. TaN and Ta was sputtered for copper diffusion barrier. Via specimen were filled by DC, pulse and pulse-reverse current electroplating methods. The effects of additives and current types on copper deposits were investigated. Vertical and horizontal cross section of the via were observed by SEM to find the defects in via. When pulse-reverse electroplating method was used, defect free via were uccessfully obtained.

• Periodical: Materials Science Forum (Volumes 510-511)
• Pages: 942-945
• DOI: https://doi.org/10.4028/www.scientific.net/MSF.510-511.942
• Online since: March 2006
• Authors: Gun Ho Chang, Si Young Chang, Jae Ho Lee
• Keywords: SiP, Additive, Electroplating, Pulse Plating, Via Filling

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