Papers by Author: C. Mark Johnson

Abstract: Trenched implanted vertical JFETs (TI-VJFETs) with self-aligned gate and source contacts were fabricated on commercial 4H-SiC epitaxial wafers. Gate regions were formed by aluminium implantation through the same silicon oxide mask which was used for etching mesa-structures. Self-aligned nickel silicide source and gate contacts were formed using a silicon oxide spacer formed on mesa-structure sidewalls by anisotropic thermal oxidation of silicon carbide followed by anisotropic reactive ion etching of oxide. Fabricated normally-on 4H-SiC TI-VJFETs demonstrated low gate leakage currents and blocking voltages exceeding 200 V.

Abstract: 3.3 kV rated 4H-SiC diodes with nickel monosilicide Schottky contacts and 2-zone JTE regions were fabricated on commercial epitaxial wafers having a 34 m thick blocking layer with donor concentration of 2.2×1015 cm-3. The diodes were fabricated with and without additional field stop rings to investigate the impact of practically realizable stopper rings on the diode blocking characteristics. The field stop ring was formed by reactive ion etching of heavily doped epitaxial capping layer. The diodes with field stop rings demonstrated significantly higher yield and reduction of reverse leakage current. The diodes demonstrated blocking voltages in excess of 4.0 kV and very low change of leakage current at ambient temperatures up to 200 °C.

Abstract: 4H-SiC diodes with 0.60 mm2 nickel silicide Schottky contacts were fabricated on commercial epitaxial layers. At room temperature, the diodes have specific on-resistances (RON-SP) down to 10.5 mΩcm2 and blocking voltages (VBL) up to 4.6 kV, which is equal to 93 % of the calculated parallel plane breakdown voltage for used epitaxial structure. The corresponding figure-of-merit, defined as (VBL)2/RON-SP, is equal to 2015 MW/cm2 and is among the highest FOM values reported to date. The diodes demonstrated stable operation at forward current of 1 A and VBL value in excess of 3.3 kV at ambient temperatures up to 200 °C.

Abstract: Few Layers Graphene (FLG) films were grown on the carbon-terminated surface of 4H-SiC from nickel silicide supersaturated with carbon. The process was realised by annealing of thin Ni films deposited on silicon carbide followed by wet processing to remove the nickel silicide. To identify and characterize the fabricated FLG films, micro-Raman scattering spectroscopy, AFM and optical microscopy have been used. The films grown on samples with initially deposited nickel thinner than 20 nm show clear graphene footprints in micro-Raman scattering spectra, namely a single component, Lorentzian shape 2D band with FWHM remarkably lower than that of the 2D peak of graphite.

Abstract: Buried gate static induction transistors (BGSITs) were fabricated on commercial 4H-SiC wafer with 20 m thick n-type epilayer having a net donor density of 0.71015 cm-3. Buried gate regions were formed by the selective implantation of high energy (up to 2 MeV) aluminium performed at 600 °C. Nitrogen was implanted at temperature of 400 °C to form a heavily doped blanket source region. Post-implantation annealing was carried out at the atmospheric pressure in argon using a graphite capping layer. Fabricated normally-on devices with source contact diameter of 0.2 mm were tested at temperatures up to 500 °C and current densities up to 270 A/cm2. The specific on-resistance of a completely open 4H-SiC BGSIT was 34 mcm2 and showed a thermally activated behaviour at temperatures up to 500 °C.

Abstract: Nickel silicide Schottky contacts were formed on 4H-SiC by consecutive deposition of a titanium adhesion layer, 4 nm thick, and nickel, 100 nm thick, followed by annealing at temperatures from 600 to 750 °C. It was found that contacts with barrier heights of 1.45 eV, consisting mainly of NiSi phase, formed in the 600-660 °C temperature range, while annealing at around 750 °C led to the formation of Ni2Si phase with barrier heights of 1.1 eV. Annealing at intermediate temperatures resulted in the nucleation of Ni2Si grains embedded in the NiSi film which were directly observed by micro-Raman mapping. It was concluded that the thermodynamically unfavourable NiSi phase appeared in the 600-660 °C temperature range due to the fact that the solid state chemical reaction between Ni and SiC at these temperatures is controlled by nickel diffusion through the titanium barrier.

Abstract: Hole initiated multiplication characteristics of 4H-SiC Separate Absorption and Multiplication Avalanche Photodiodes (SAM-APDs) with a n- multiplication layer of 2.7 µm were obtained using 325nm excitation at temperatures ranging from 300 to 450K. The breakdown voltages increased by 200mV/K over the investigated temperature range, which indicates a positive temperature coefficient. Local ionization coefficients, including the extracted temperature dependencies, were derived in the form of the Chynoweth expression and were used to predict the hole multiplication characteristics at different temperatures. Good agreement was obtained between the measured and the modeled multiplication using these ionization coefficients. The impact ionization coefficients decreased with increasing temperature, corresponding to an increase in breakdown voltage. This result agrees well with the multiplication characteristics and can be attributed to phonon scattering enhanced carrier cooling which has suppressed the ionization process at high temperatures. Hence, a much higher electric field is required to achieve the same ionization rates.

Abstract: The hole dominated avalanche multiplication characteristics of 4H-SiC Separate Absorption and Multiplication avalanche photodiodes (SAM-APDs) were determined experimentally and modeled using a local multiplication model. The 0.5x 0.5mm2 diodes had very low dark current and exhibited sharp, uniform breakdown at about 580V. The data agree with modeling result using extrapolated impact ionization coefficients reported by Ng et al. and is probably valid for electric fields as low as ~0.9MV/cm at room temperature provided that both the C-V measurements and electric field determination in this work are correct. The packaged devices demonstrate a positive temperature coefficient of breakdown voltage for temperatures ranging from 100K to 300K which is a desired feature for extreme environment applications.

Abstract: Trenched and implanted vertical JFETs (TI-VJFETs) with blocking voltages of 700 V were fabricated on commercial 4H-SiC epitaxial wafers. Vertical p+-n junctions were formed by aluminium implantation in sidewalls of strip-like mesa structures. Normally-on 4H-SiC TI-VJFETs had specific on-state resistance (RO-S ) of 8 mW×cm2 measured at room temperature. These devices operated reversibly at a current density of 100 A/cm2 whilst placed on a hot stage at temperature of 500 °C and without any protective atmosphere. The change of RO-S with temperature rising from 20 to 500 °C followed a power law (~ T 2.4) which is close to the temperature dependence of electron mobility in 4H-SiC.

Abstract: The adoption of SiC devices as a viable technology depends crucially on maximising the potential advantages of the material. This is best achieved by the adoption of co-design techniques in which the optimisation of the SiC device is performed in parallel to that of the package and the overall application. This paper considers suitable techniques for this co-design and describes new approaches to the development of SiC technology for practical applications.