Papers by Author: Christophe Jacquier

Abstract: Al-Si and Ge-Si systems were studied for selective epitaxial growth (SEG) of 4H-SiC by the Vapour-Liquid-Solid mechanism. Al-Si and Ge-Si bilayers stackings were deposited on 8° off, Si face, 4H-SiC substrates. After patterning of the layers, the samples were heated up to 1000°C and 1220°C, respectively, for Al-Si and Ge-Si stackings in order to melt the layers. Propane was introduced either during the initial heating ramp, before melting of the alloy, or after reaching the temperature plateau. It was found that introduction of propane before melting was a key parameter in order to improve the homogeneity of the deposit. In both cases, SEG of SiC was achieved. However, the best results were obtained with Ge-Si system giving smooth and uniform ∼100 nm thick epitaxial deposits on all the pattern sizes and shapes. Ge incorporation in the SiC was found to be rather limited but homogeneous in the layer.

Abstract: The vapour-Liquid-Solid mechanism was used for growing epitaxial SiC layers on onaxis 6H-SiC and 4H-SiC substrates. By feeding Al70Si30 melts with propane, homoepitaxial growth was demonstrated down to 1100°C on both polytypes. At this temperature, the surface morphology is rough and non uniform with spiral growth forming large hillocks at the places where screw dislocations emerge from the substrate. Raman spectroscopy confirms the absence of the 3C-SiC polytype and shows the high Al doping of the layers. This growth temperature of 1100°C is the lowest one ever reported for growing homoepitaxial layers on low tilt angle SiC substrates. Increasing the temperature to 1200°C eliminates these hillocks but creates other morphological features due to fast substrate etching at this high temperature before growth starts.

Abstract: Al-Si patterns were formed on n-type 4H-SiC substrate by a photolithographic process including wet Al etching and Si/SiC reactive ion etching (RIE) process. RF 1000°C annealing under C3H8 flow was performed to obtain p+ SiC layers by a Vapour-Liquid-Solid (VLS) process. This method enables to grow layers with different width (up to 800 µm) and various shapes. Nevertheless the remaining Al-based droplets on the largest patterns are indicators of crack defects, going through the p+ layer down to the substrate. SIMS analyses have shown an Al profile with high doping concentration near the surface, high N compensation and Si/C stoechiometry variation between the substrate and the VLS layer. The hydrogen profile follows the Al profile in the VLS layer with an overshoot at the VLS/substrate interface. I-V measurements performed directly on the semiconductor layers have confirmed the formed p-n junction and allowed to measure a sheet resistance of 5.5 kW/ı

Abstract: The so-called VLS (Vapour-Liquid-Solid) mechanism in an Al-Si melt has recently demonstrated the capability to grow at low temperature single crystalline 4H-SiC layers, with a high Al content. Using the newly developed VLS technique, we have deposited several 4H-SiC layers and determined the incorporated Al level by SIMS (Secondary Ion Mass Spectroscopy). Depending on the sample, we have found that the SIMS doping level ranges from 5x1019 to 1x1021 at.cm-3. This last value is the highest one reported so far for in-situ doped SiC:Al. From TEM (Transmission Electron Microscopy) analyses we show that the layers are single crystals, with a high density of defects located only at the lower interface and no foreign phase inclusion. These results compare well with the ones obtained in previous works using alternative doping techniques, like ion implantation, chemical vapour deposition or sublimation. It thus suggests that Al solubility limit in SiC is rather temperature independent.