Authors: Hassan Habib, Nicolas G. Wright, Alton B. Horsfall
Abstract: In the last decade, or so, many prototype Silicon Carbide devices and circuits have been demonstrated which have surpassed the performance of Silicon for the ability to function in extreme environments. However, the commercialisation of SiC technology now demands high performance and energy efficient miniaturised devices and circuits which can operate on the limited power resources available in harsh and hot hostile environments. This leads to refining, experimenting and perhaps re-designing devices which can rightly claim their share in the current Si dominant market. Consequently, there is a need for accurate simulation models for device engineers to understand device behaviour, examine performance trade-offs and verify the manufacturability of the design. This paper reports the first comprehensive study on the development and validation of high temperature 4H-SiC Technology Computer Aided Design (TCAD) Finite Element simulation model for low power applications. The model is based on 4H-SiC physical and material properties and is validated by high temperature 4H-SiC lateral JFET data, fabricated and characterised by our group at Newcastle University.
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Authors: Jonathan P. Goss, Patrick R. Briddon, V. Kartheek Nagareddy, Nicolas G. Wright, Alton B. Horsfall, Joshua D. Caldwell, D. Kurt Gaskill, Glenn G. Jernigan
Abstract: Epitaxial graphene produced from SiC substrates exhibits a carrier mobility re- duction thought to arise from intercalated silicon. We present the results of density functional simulations and show that individual silicon atoms are highly mobile on and between graphene sheets, suggesting that thermally stable structures involving individual Si impurities are likely to result from the interaction of silicon with defects in the graphene sheets.
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Authors: Konstantin Vassilevski, Irina P. Nikitina, Alton B. Horsfall, Nicolas G. Wright, Andrew J. Smith, C. Mark Johnson
Abstract: Trenched implanted vertical JFETs (TI-VJFETs) with self-aligned gate and source contacts were fabricated on commercial 4H-SiC epitaxial wafers. Gate regions were formed by aluminium implantation through the same silicon oxide mask which was used for etching mesa-structures. Self-aligned nickel silicide source and gate contacts were formed using a silicon oxide spacer formed on mesa-structure sidewalls by anisotropic thermal oxidation of silicon carbide followed by anisotropic reactive ion etching of oxide. Fabricated normally-on 4H-SiC TI-VJFETs demonstrated low gate leakage currents and blocking voltages exceeding 200 V.
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Authors: Konstantin Vassilevski, Irina P. Nikitina, Alton B. Horsfall, Nicolas G. Wright, C. Mark Johnson
Abstract: 3.3 kV rated 4H-SiC diodes with nickel monosilicide Schottky contacts and 2-zone JTE regions were fabricated on commercial epitaxial wafers having a 34 m thick blocking layer with donor concentration of 2.2×1015 cm-3. The diodes were fabricated with and without additional field stop rings to investigate the impact of practically realizable stopper rings on the diode blocking characteristics. The field stop ring was formed by reactive ion etching of heavily doped epitaxial capping layer. The diodes with field stop rings demonstrated significantly higher yield and reduction of reverse leakage current. The diodes demonstrated blocking voltages in excess of 4.0 kV and very low change of leakage current at ambient temperatures up to 200 °C.
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Authors: Rupert C. Stevens, Konstantin Vassilevski, John E. Lees, Nicolas G. Wright, Alton B. Horsfall
Abstract: Detectors capable of withstanding high radiation environments for prolonged periods of exposure are essential for the monitoring of nuclear power stations and nuclear waste as well as for space exploration. Schottky diode X-ray detectors were exposed to high dose proton irradiation (1013 cm-2, 50 MeV) and changes in the detection resolution (spectroscopic full width half-maximum) have been observed. Using Deep Level Transient Spectroscopy (DLTS) and the degradation of the electrical characteristics of the diode, we have shown that radiation induced traps located in the upper half of the bandgap have reduced the concentration of carriers.
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Authors: Benjamin J.D. Furnival, Konstantin Vassilevski, Nicolas G. Wright, Alton B. Horsfall
Abstract: In this paper we demonstrate the recovery of Ohmic contacts formed on C-face 4H-SiC following high temperature post-processing. After a typical high-κ dielectric anneal in O2 for 3 minutes at 650 °C, replacing the metallization stack is revealed to significantly reduce the damage produced in the I-V characteristics. Using C-AFM we have also studied the mechanisms responsible for Ohmic contact formation, presenting a possible relationship between changes in the SiC crystal orientation and the establishment of Ohmic behaviour.
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Authors: Hassan Habib, Nicolas G. Wright, Alton B. Horsfall
Abstract: The variation in device process parameters is a core issue in the realisation of complex SiC logic for extreme environments. Factorial design was used to study the effect of variation in four key process parameters on the threshold voltage of an n-channel lateral JFET. Each parameter is simultaneously varied by +/-10% from the default value and the individual and combined effects were calculated at 300, 600 and 1000K. Consequently, we show how these variations in device parameters degrade the threshold voltage, VI, and, hence, the noise margin of logic inverter.
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Authors: Ming Hung Weng, Simon Barker, Rajat Mahapatra, Benjamin J.D. Furnival, Nicolas G. Wright, Alton B. Horsfall
Abstract: We have investigated the annealing of fixed oxide charge and interfacial traps in MISiC strucures by means of the photo capacitance voltage technique at temperatures up to 500°C. Elevated temperature measurements show reduced hysteresis and reduced fixed oxide charge at the interface. The photo capacitance technique shows a real-time measurement at elevated temperatures, in which electrons are populated by photo energy, in a 4H-SiC MIS structure. We also confirm the reduction of fixed oxide charge at the interface by means of high temperature post deposition annealing, which occurs during the high temperature measurements.
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Authors: Simon Barker, Bing Miao, Daniel Brennan, Konstantin Vassilevski, Nicolas G. Wright, Alton B. Horsfall
Abstract: This paper demonstrates the rst high temperature silicon carbide based energy
harvesting module suitable for use in hostile environments. The system comprises a of SiC pin photovoltaic cell, HfO2 based capacitive storage bank and Schottky blocking diode. The system demonstrates the ability to harvest energy from a UV rich environment and store this
energy on a HfO2 metal - insulator - metal (MIM) capacitor bank. The system unies work thathas focussed on developing high temperature energy harvesting technologies, a key technology
in facilitating the deployment of resilient wireless sensor nodes into hostile environments. The system demonstrates the capability to store an initial voltage of 2.3V decaying to 0.5V in 300ms
with a Schottky based system. Replacing the Schottky diode with a switched system, a much lower decay rate to 1.5V in over 8s was observed. This shows that an effective harvester could be made with a switched power controller.
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Authors: Gholam Reza Yazdi, Konstantin Vassilevski, José M. Córdoba, Daniela Gogova, Irina P. Nikitina, Mikael Syväjärvi, Magnus Odén, Nicolas G. Wright, Rositza Yakimova
Abstract: Free standing AlN wafers were grown on pre-patterned and in situ patterned 4H-SiC substrates by a physical vapor transport method. It is based on the coalescence of AlN microrods, which evolve from the apex of SiC pyramids grown on the SiC substrate during a temperature ramp up for in situ patterned substrate and SiC pyramids formed by reactive ion etching (RIE). This process yields stress-free (according XRD and Raman results) AlN single crystals with a thickness up to 400 µm and low dislocation density.
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