Papers by Author: Toshiyuki Miyanagi

Abstract: Synchrotron reflection X-ray topography and KOH etching were applied to investigate the effects of the ion implantation/annealing process on the existing dislocations in the 4H-SiC epilayers and second epitaxial growth on the ion implanted layer. No systematic generation of dislocations or stacking faults caused by the second epitaxial growth on the implanted layer was observed, while BPDs were confirmed to migrate in the epilayer during the implantation/annealing process. The BPDs bend markedly near the bottom of the implanted layer and tend to lie along the <1-100> (perpendicular to the off-cut direction) after the implantation/annealing process. The lattice mismatch strain created by the implantation is a possible driving force of the glide motion of the BPDs.

Abstract: We investigated the location of the nuclei of Shockley-type stacking faults (SSFs) in the 4H-SiC pin diodes, using electroluminescence (EL) imaging. The nuclei of SSFs were identified as three types, located (i) on the mesa edge, (ii) in the surface region, and (iii) inside the epilayer. We compared the frequency of the nuclei according to these three locations for the (0001) and (000-1) pin diodes. The number of SSFs originated from the nuclei inside the epilayer in the (000-1) pin diodes was much less (<4 cm-2) than that in the (0001) pin diodes. However, the numbers of SSF nuclei (0.3 ~ 0.8 per device) located on the mesa wall and the surface region in the (000-1) pin diodes were comparable to the (0001) pin diodes. We also investigated the process responsible for generating the SSF nuclei.

Abstract: We compared the electrical characteristics of 4H-SiC(0001) and (000-1) Schottky barrier diodes (SBDs), and derived the Schottky barrier heights (Hbs) of Ta, W, Mo, and Pd on {0001}. We investigated the annealing temperature dependence of Hbs in Mo and the W Schottky contacts for (0001) and (000-1). The Hbs are increased by annealing, except for the W Schottky contact on (0001). The yields of 0.25 cm2 as-deposited Mo-SBDs were 93.3% for (0001) and 71.1% for (000-1), respectively. We also demonstrated over 1 cm2 (0001) as-deposited Mo-SBD with a low leakage current, an excellent ideality factor, and no excess current, encouraging the enlargement of the active area in the SBD.

Abstract: Forward voltage degradation has been reduced by fabricating diodes on the (000-1)C-face. The reverse recovery characteristics of the 4H-SiC pin diode on the (000-1)C-face have been investigated. The pin diode on the C-face has superior potential to that on the Si-face among all parameters of the reverse recovery characteristics. The pin diode on the Si-face after conducting a current stress test tends to exhibit a fast turn-off as compared with that before conducting the stress test. On the C-face, however, there is little difference in reverse recovery characteristics between before and after conducting the current stress test.

Abstract: Propagation and nucleation of basal plane dislocations (BPDs) in 4H-SiC(000-1) and (0001) epitaxy were compared. Synchrotron reflection X-ray topography was performed before and after epitaxial growth to classify the BPDs into those propagated from the substrate into the epilayer and those nucleated in the epilayer. It was revealed that the propagation ratio of BPDs for the (000-1) epitaxy was significantly smaller than that for the (0001) epitaxy. Growing (000-1) epilayers at a high C/Si ratio of 1.2 achieves a further reduction in BPDs to only 3 cm-2 for those propagated from the substrate, and 16 cm-2 for those nucleated in the epilayer. A dramatic increase was also found in the nucleation of BPDs omitting the re-polishing and in-situ H2 etching procedure.

Abstract: We have developed non-destructive in-house observation techniques for dislocations and stacking faults (SFs) in 4H-SiC epilayers. Low temperature photoluminescence (PL) mapping was carried out at 100K using He-Cd laser (325 nm) as an exciation source. PL mapping at ~420 nm was used to investigate basal plane dislocations (BPDs), Shockley stacking faults (SSFs) and boundary, while PL mapping at ~470 nm and 100K obtained in-grown SF images. In addition, using a high-resolution laboratory X-ray topography system with a four-crystal collimator, we succeeded in recording BPDs propagating along [11-20]. From the measurement results, new evaluation techniques for dislocations and SFs other than KOH etching and Synchotron radiation topography were demonstrated on Si- and C-face 4H-SiC epilayers.

Abstract: We provide evidence of shrinking of Shockley-type stacking faults (SSFs) in the SiC epitaxial layer by high temperature annealing. Photoluminescence (PL) mapping in combination with high-power laser irradiation makes it possible to investigate the formation of SSFs, which lie between a pair of partial dislocations formed by dissociation of a basal plane dislocation (BPD), without fabrication of pin diodes. Using this technique, we investigated the annealing effect on SSFs. Comparing before and after annealing at 600°C for 10 min, it became obvious that high-temperature annealing results in shrinking of the faulted area of the SSFs. The SSFs form into the same features as those before annealing when high-power laser irradiation is performed again on the same area. This result shows that the faulted area of SSFs shrinks by 600°C annealing but the nuclei of SSFs (BPDs) do not disappear.

Abstract: The dependence of forward voltage degradation on crystal faces for 4H-SiC pin diodes has been investigated. The forward voltage degradation has been reduced by fabricating the diodes on the (000-1) C-face off-angled toward <11-20>. High-voltage 4H-SiC pin diodes on the (000-1) C-face with small forward voltage degradation have also been fabricated successfully. A high breakdown voltage of 4.6 kV and DVf of 0.04 V were achieved for a (000-1) C-face pin diode. A 8.3 kV blocking performance, which is the highest voltage in the use of (000-1) C-face, is also demonstrated in 4H-SiC pin diode.

Abstract: We investigated the effect of high temperature annealing on the Schottky barrier height (Fb) and the ideality factor (n-factor) of a Mo contact. In a Mo contact, the Fb increased and the leakage current decreased by annealing at 600oC, while no increase in n-factor and forward excess current owing to the high temperature annealing was observed. The Schottky barrier diode with Mo contact annealed at 600oC showed a blocking-voltage (Vb) of 4.15 kV and a specific on resistance (Ron) of 9.07 mWcm2, achieving a high Vb 2/Ron value of 1898 MW/cm2.

Abstract: In this paper, we investigated the density of basal plane dislocations (BPDs) in 4H-SiC epilayers grown on (0001) and (000-1). Re-polishing of the substrate surface, in-situ H2 etching and off-cut angle were found to influence the propagation of BPDs into the epilayers. The epitaxial growth on (000-1) substrates yields a relatively low density of BPDs compared to growth on (0001). The electrical characteristics of pn diodes were also investigated, and the suppressed forward degradation and high-voltage blocking performance were obtained in the use of the (000-1) epilayers.