Authors: Y.Y. Gomeniuk, Y.V. Gomeniuk, A. Nazarov, P.K. Hurley, Karim Cherkaoui, Scott Monaghan, Per Erik Hellström, H.D.B. Gottlob, J. Schubert, J.M.J. Lopes
Abstract: The paper presents the results of electrical characterization of MOS capacitors and SOI MOSFETs with novel high-κ LaLuO3 dielectric as a gate oxide. The energy distribution of interface state density at LaLuO3/Si interface is presented and typical maxima of 1.2×1011 eV–1cm–2 was found at about 0.25 eV from the silicon valence band. The output and transfer characteristics of the n- and p-MOSFET (channel length and width were 1 µm and 50 µm, respectively) are presented. The front channel mobility appeared to be 126 cm2V–1s–1 and 70 cm2V–1s–1 for n- and p-MOSFET, respectively. The front channel threshold voltages as well as the density of states at the back interface are presented.
87
Authors: Motoki Kobayashi, Hidetsugu Uchida, Akiyuki Minami, Toyokazu Sakata, Romain Esteve, Adolf Schöner
Abstract: 3C-SiC MOSFET with 200 cm2/Vs channel mobility was fabricated. High performance device processes were adopted, including room temperature implantation with resist mask, polysilicon-metal gates, aluminium interconnects with titanium and titanium nitride and a specially developed activation anneal at 1600°C in Ar to get a smooth 3C-SiC surface and hence the expected high channel mobility. CVD deposited oxide with post oxidation annealing was investigated to reduce unwanted oxide charges and hence to get a better gate oxide integrity compared to thermally grown oxides. 3C-SiC MOSFETs with 600 V blocking voltage and 10 A drain current were fabricated using the improved processes described above. The MOSFETs assembled with TO-220 PKG indicated specific on-resistances of 5 to 7 mΩcm2.
645
Authors: Muneharu Kato, Yuichiro Nanen, Jun Suda, Tsunenobu Kimoto
Abstract: Post-oxidation annealing (POA) in Ar at high temperature has been performed during fabrication of 4H-SiC metal-oxide-semiconductor field-effect transistors (MOSFETs). The gate oxides were formed by thermal oxidation followed by N2O annealing, then annealed in Ar for 30 min or 5 h at 1300 °C. The results of Secondary Ion Mass Spectrometry (SIMS) measurements indicated that the C atoms accumulated at the SiO2/SiC interface by thermal oxidation diffused during the 5h-Ar annealing. The characteristics of n-channel MOSFETs were improved and the peak value of field effect mobility was increased to 33 cm2/Vs from 19 cm2/Vs by extending the Ar annealing time.
445
Authors: Shinsuke Harada, Sachiko Ito, Makoto Kato, Akio Takatsuka, Kazutoshi Kojima, Kenji Fukuda, Hajime Okumura
Abstract: UMOSFET is theoretically suitable to decrease the on-resistance of the MOSFET. In this study, in order to determine the cell structure of the SiC UMOSFET with extremely low on-resistance, influences of the orientation of the trench and the off-angle of the wafer on the MOS properties are investigated. The channel resistance, gate I-V curves and instability of threshold voltage are superior on the {11-20} planes as compared with other planes. On the vicinal off wafer, influence of the off-angle disappears and the properties on the equivalent planes are almost the same. The obtained results indicate that the extremely low on-resistance with the high stability and high reliability is possible in the SiC UMOSFET by the hexagonal cell composed of the six {11-20} planes on the vicinal off wafer, and actually an extremely low channel resistance was demonstrated on the hexagonal UMOSFET with the six {11-20} planes on the vicinal off wafer.
999
Authors: Liang Chun Yu, Kin P. Cheung, Vinayak Tilak, Greg Dunne, Kevin Matocha, Jason P. Campbell, John S. Suehle, Kuang Sheng
Abstract: Low channel mobility is one of the biggest challenges to commercializing SiC MOSFETs. Accurate mobility measurement is essential for understanding the mechanisms that lead to low mobility. The most widely used effective mobility measurements overestimate the inversion charge for devices that have high level of defects. Mobility measured by the Hall effect is more accurate; however the conventional Hall mobility measurement is tedious. In this work, we demonstrate a wafer-level Hall measurement technique, which is simple and convenient to implement. With this method, extensive study of the mobility degradation is possible.
979
Authors: Masato Noborio, Michael Grieb, Anton J. Bauer, Dethard Peters, Peter Friedrichs, Jun Suda, Tsunenobu Kimoto
Abstract: In this paper, nitrided insulators such as N2O-grown oxides, deposited SiO2 annealed in N2O, and deposited SiNx/SiO2 annealed in N2O on thin-thermal oxides have been investigated for realization of high performance n- and p-type 4H-SiC MIS devices. The MIS capacitors were utilized to evaluate MIS interface characteristics and the insulator reliability. The channel mobility was determined by using the characteristics of planar MISFETs. Although the N2O-grown oxides are superior to the dry O2-grown oxides, the deposited SiO2 and the deposited SiNx/SiO2 exhibited lower interface state density (n-MIS: below 7x1011 cm-2eV-1 at EC-0.2 eV, p-MIS: below 6x1011 cm-2eV-1 at EV+0.2 eV) and higher channel mobility (n-MIS: over 25 cm2/Vs, p-MIS: over 10 cm2/Vs). In terms of reliability, the deposited SiO2 annealed in N2O exhibits a high charge-to-breakdown over 50 C/cm2 at room temperature and 15 C/cm2 at 200°C. The nitrided-gate insulators formed by deposition method have superior characteristics than the thermal oxides grown in N2O.
825
Authors: Kenji Fukuda, Akimasa Kinoshita, Takasumi Ohyanagi, Ryouji Kosugi, T. Sakata, Y. Sakuma, Junji Senzaki, A. Minami, Atsushi Shimozato, Takuma Suzuki, Tetsuo Hatakeyama, Takashi Shinohe, Hirofumi Matsuhata, Hiroshi Yamaguchi, Ichiro Nagai, Shinsuke Harada, Kyoichi Ichinoseki, Tsutomu Yatsuo, Hajime Okumura, Kazuo Arai
Abstract: The influences of processing and material defects on the electrical characteristics of large-capacity (approximately 100A) SiC-SBDs and SiC-MOSFETs have been investigated. In the case of processing defects, controlled activation annealing is the most important factor. On the other hand for material defects, the number of epitaxial defects must be decreased to zero for both SBDs and MOSFETs. The dislocation defects in SiC wafers are dangerous for the breakdown voltage of MOSFETs. However, they are not killer defects. If the epitaxial defect density is sufficiently low and the dislocation density is in the order of 10000cm-2, the long- term reliability of the gate oxide at the electric field of 3MV/cm can be guaranteed.
655
Authors: Sergey L. Rumyantsev, Michael S. Shur, Michael E. Levinshtein, Pavel A. Ivanov, John W. Palmour, Mrinal K. Das, Brett A. Hull
Abstract: Low-frequency noise in 4H-SiC MOSFETs has been measured for the first time. At drain currents varying from deep subthreshold to strong inversion, the 1/f (flicker) noise dominated at frequencies 1 - 105 Hz. The dependence of relative spectral noise density, , on drain current Id (at a constant drain voltage Vd) differs qualitatively from that in Si MOSFETs. In Si MOSFETs, ~ 1/ in strong inversion, whereas tends to saturate in sub-threshold. In 4H-SiC MOSFETs under study, ~ 1/ over the whole range of currents from deep sub-threshold to strong inversion. Similar noise behavior is often observed in poly- or a-Si TFTs. The effective channel mobility in 4H-SiC MOSFETs, 3 - 7 cm2/Vs, is also as low as that in TFTs. Both noise behavior and transport properties of 4H-SiC MOSFETs are explained, analogously to TFTs, by a high density of localized states (bulk and interface) near the conduction band edge in the ion implanted p-well.
817
Authors: Masato Noborio, Jun Suda, Tsunenobu Kimoto
Abstract: P-channel MOSFETs have been fabricated on 4H-SiC (0001) face as well as on 4H-SiC (03-38) and (11-20) faces. The gate oxides were formed by thermal oxidation in dry N2O ambient, which is widely accepted to improve the performance of n-channel SiC MOSFETs. The p-channel SiC MOSFETs with N2O-grown oxides on 4H-SiC (0001), (03-38), and (11-20) faces show a channel mobility of 7 cm2/Vs, 11 cm2/Vs, and 17 cm2/Vs, respectively. From the quasi-static C-V curves measured by using gate-controlled diodes, the interface state density was calculated by an original method. The interface state density was the lowest at the SiO2/4H-SiC (03-38) interface (about 1x1012 cm-2eV-1 at EV + 0.2 eV). The authors have applied deposited oxides to the 4H-SiC p-channel MOSFETs. The (0001), (03-38), and (11-20) MOSFETs with deposited oxides exhibit a channel mobility of 10 cm2/Vs, 13 cm2/Vs, and 17 cm2/Vs, respectively. The deposited oxides are one of effective approaches to improve both n-channel and p-channel 4H-SiC MOS devices.
789
Authors: Hitoshi Moriya, Shiro Hino, Naruhisa Miura, Tatsuo Oomori, Eisuke Tokumitsu
Abstract: We have examined the effect of oxidant in metalorganic chemical vapor deposition (MOCVD) of Al2O3 gate insulator on MOSFET electrical properties. High channel mobility of 311 cm2/Vs for Al2O3/SiC MOSFET is demonstrated when the Al2O3 gate insulator is deposited on HF-treated substrate at 190oC using triethyl-aluminum (TEA) and O2 as Al source and oxidant gas, respectively. This is much higher than that of Al2O3/SiC MOSFET when Al2O3 gate insulator was deposited with TEA and H2O at the same temperature. In addition, channel mobility at high gate electric field can be improved by using O2 as oxidant gas and effective mobility of 207 cm2/Vs is obtained at SiO2 equivalent gate electric field of 1.5 MV/cm.
777