Papers by Keyword: Interface States (or Traps)

Abstract: The model of exchange coupling between ferromagnetic metal layers across a non-degenerate semiconductor spacer with point-like defects is considered. Calculation of an asymptotic behavior of the exchange integral is carried out. The exchange integral is found to alternate its sign depending on the position and filling of the deep impurity energy levels into the spacer. The results provide a basis for interpretation of recent experiments in iron/silicon multilayers.

Abstract: The recent improvement of GaN material quality launched new perspective for its application in power devices. However, ion-implanted guard-ring edge terminations, necessary to improve the breakdown voltage, are not well developed as in SiC technology. Indeed, the effects of high-temperature annealing, required for the electrical activation of the implanted species in GaN, on the electrical behaviour of Schottky contact was not reported. In this work, the influence of high temperature annealing (1150-1200°C) on the surface morphology of GaN and on the electrical behaviour of Schottky contact was studied. Although the morphology of GaN surface did not substantially change after annealing, a worsening of the electrical behaviour of Schottky contact was observed. This latter was ascribed to the formation of a high density of interface states after annealing.

Abstract: Ion implantation for selective doping of SiC is problematic due to damage generation during the process and low activation of dopants. In SiC bipolar junction transistor (BJT) the junction termination extension (JTE) can be formed without ion implantation using instead a controlled etching into the epitaxial base. This etched JTE is advantageous because it eliminates ion implantation induced damage and the need for high temperature annealing. However, the dose, which is controlled by the etched base thickness and doping concentration, plays a crucial role. In order to find the optimum parameters, device simulations of different etched base thicknesses have been performed using the software Sentaurus Device. A surface passivation layer consisting of silicon dioxide, considering interface traps and fixed trapped charge, has been included in the analysis by simulations. Moreover a comparison with measured data for fabricated SiC BJTs has been performed.

Abstract: Low-frequency noise in 4H-SiC MOSFETs has been measured for the first time. At drain currents varying from deep subthreshold to strong inversion, the 1/f (flicker) noise dominated at frequencies 1 - 105 Hz. The dependence of relative spectral noise density, , on drain current Id (at a constant drain voltage Vd) differs qualitatively from that in Si MOSFETs. In Si MOSFETs, ~ 1/ in strong inversion, whereas tends to saturate in sub-threshold. In 4H-SiC MOSFETs under study, ~ 1/ over the whole range of currents from deep sub-threshold to strong inversion. Similar noise behavior is often observed in poly- or a-Si TFTs. The effective channel mobility in 4H-SiC MOSFETs, 3 - 7 cm2/Vs, is also as low as that in TFTs. Both noise behavior and transport properties of 4H-SiC MOSFETs are explained, analogously to TFTs, by a high density of localized states (bulk and interface) near the conduction band edge in the ion implanted p-well.

Abstract: Silicon Carbide (SiC) based metal oxide semiconductor field effect transistors (MOSFETs) were fabricated and characterized using gated hall measurements with different p-type substrate doping concentration (7.2X1016cm-3 and 2X1017 cm-3). An interface trap state density of 5X1013 cm-2eV-1 was observed nearly 0.1 eV above the conduction band edge leading to the conclusion that these states are present in the silicon dioxide rather than the interface. The Hall mobility of the MOSFETs decreased from 26.5 to 20 cm2/Vs as the doping was increased from 7.2X1016 to 2X1017cm-3. The decrease in mobility is primarily due to an increase in the surface electric field that causes an increase in surface roughness scattering. The inversion layer mobility when plotted as a function of average surface electric field is not independent of doping concentration as is the case in silicon MOSFETs because the dominant scattering mechanism is not phonon scattering.

Abstract: P-channel MOSFETs have been fabricated on 4H-SiC (0001) face as well as on 4H-SiC (03-38) and (11-20) faces. The gate oxides were formed by thermal oxidation in dry N2O ambient, which is widely accepted to improve the performance of n-channel SiC MOSFETs. The p-channel SiC MOSFETs with N2O-grown oxides on 4H-SiC (0001), (03-38), and (11-20) faces show a channel mobility of 7 cm2/Vs, 11 cm2/Vs, and 17 cm2/Vs, respectively. From the quasi-static C-V curves measured by using gate-controlled diodes, the interface state density was calculated by an original method. The interface state density was the lowest at the SiO2/4H-SiC (03-38) interface (about 1x1012 cm-2eV-1 at EV + 0.2 eV). The authors have applied deposited oxides to the 4H-SiC p-channel MOSFETs. The (0001), (03-38), and (11-20) MOSFETs with deposited oxides exhibit a channel mobility of 10 cm2/Vs, 13 cm2/Vs, and 17 cm2/Vs, respectively. The deposited oxides are one of effective approaches to improve both n-channel and p-channel 4H-SiC MOS devices.

Abstract: In order to improve Silicon Carbide MOSFET device performance, it is important to minimize the on-state losses by improving the effective channel mobility, which can be done by decreasing interfacial charge consisting of interface traps, fixed charge, and oxide traps, which degrade mobility due to Coulombic scattering. This paper considers a method for distinguishing between oxide traps and fixed charge, and discusses how this charge has varied with processing over the last several years. Our results show that, over the period of study, NF has trended downward. Also, the number of switching oxide traps, which gives a lower bound for Not, appears to have decreased considerably. The trends for improvement in NF and ΔNot are promising, but our data suggests that NF and Not remain much too high and need to be reduced further to realize significant gains in SiC MOSFET performance.

Abstract: The electrical characteristics of MOSFETs fabricated on 4H-SiC with a process based on N implantation in the channel region before the growth of the gate oxide are reported as a function of the N concentration at the SiO2/SiC interface up to 6  1019 cm-3. The field effect mobility improves with increasing N concentration. At room temperature values change from 4 cm2/Vs for the not implanted sample up to 42 cm2/Vs for the sample with the highest N concentration. Furthermore, the field effect mobility increases with temperature and presents values above 60 cm2/Vs at 200 °C. The MOSFETs with the better electrical characteristics (higher mobility, lower threshold voltage, lower subthreshold swing) were fabricated by a low thermal budget oxidation process, thank to the use of a high N implantation dose able to produce an amorphous SiC surface layer. A strong correlation among the increasing of the N concentration at the SiO2/SiC interface, the reduction of the interface state density located near the conduction band and the improvement of the MOSFETs performance was obtained.

Abstract: The oxide reliability of metal-oxide-semiconductor (MOS) capacitors on 4H-SiC(000-1) carbon face was investigated. The gate oxide was fabricated by using N2O nitridation. The effective conduction band offset (Ec) of MOS structure fabricated by N2O nitridation was increased to 2.2 eV compared with Ec = 1.7 eV for pyrogenic oxidation sample of. Furthermore, significant improvements in the oxide reliability were observed by time-dependent dielectric breakdown (TDDB) measurement. It is suggested that the N2O nitridation as a method of gate oxide fabrication satisfies oxide reliability on 4H-SiC(000-1) carbon face MOSFETs.

Abstract: In this work the effect of oxidation temperature of 4H-SiC on the density of near-interface traps is studied. It is seen that the portion of traps with slower emission times decreases with increasing oxidation temperature. Despite this reduction, high temperature oxidation alone is not useful to achieve low density of interface traps at the SiO2/4H-SiC interface.