Authors: Nikolai Yarykin, Nikolay V. Abrosimov
Abstract: The IR absorption spectra and kinetics of the oxygen solid solution decay were
studied in the Si1¡xGex crystals (0 · x · 0:055) plastically deformed at 680±C up to the 2{5%
residual strain. It is found that the defects of non-dislocation nature, the dislocation trails, are
formed during the plastic deformation of all studied SiGe crystals. The ¯ne structure of the IR
absorption spectra around the 1000 cm¡1 wave number is found to be nearly identical in the
pure Si (no Ge) samples and Si1¡xGex crystals with x · 0:02. At higher x the ¯ne structure
was not detected due to the alloy-related broadening. In all studied crystals, the decay of the
supersaturated oxygen solid solution at 650±C is determined by oxygen agglomeration at the
dislocation trails as shown by the comparison with the samples annealed at 1150±C.
295
Authors: Lyudmila I. Khirunenko, Yu.V. Pomozov, Mikhail G. Sosnin, A.V. Duvanskii, S.K. Golyk, Nikolay V. Abrosimov, H. Riemann
Abstract: The measurements of stress induced dichroism on oxygen absorption band near 1107
cm-1 in Si1-xGex compounds and subsequent kinetics of the dichroism recovery upon isothermal
annealing have been carried out. It has been found that the magnitude of introduced by uniaxial
stress dichroism decreases with increasing Ge content. Two components in the dichroism annealing
kinetics have been found. On the basis of studying absorption spectra of samples under
investigations it was assumed that two components in relaxation correspond to the diffusion of
oxygen being in a different nearest environment: the one component corresponds to oxygen
surrounded by silicon atoms and the second one to the oxygen the neighbour of which is Ge atom.
Diffusivity for each of the components has been determined. It has been shown that the diffusivity
of oxygen that is in both of these configurations decreases with increasing Ge content.
181
Authors: Yi Wei Chen, Nien Ting Ho, Jerander Lai, T.C. Tsai, C.C. Huang, S.F. Tzou, James M.M. Chu
Abstract: NiPt self-aligned silicide (salicide) has become a major candidate for the 45nm node due to its better thermal stability and the surface morphology of NiSi on Si substrate [1,2]. SiGe has been proposed for PMOS strain engineering [3]. The relevant SiGe oxidation behavior [4], reaction with platinum [5] and thermal stress behavior [6] are important factors in developing a process for 45nm NiPt salicide over SiGe stressor. These concerns require the review of the current process for NiPt to verify its compatibility and extendibility.
211
Authors: Roger Loo, Andriy Hikavyy, Frederik E. Leys, Masayuki Wada, Kenichi Sano, Brecht De Vos, Antoine Pacco, Mireia Bargallo Gonzalez, Eddy Simoen, Peter Verheyen, Wendy Vanherle, Matty Caymax
Abstract: Several device concepts have been further evaluated after the successful implementation of epitaxial Si, SiGe and/or Si:C layers. Most of the next device generations will put limitations on the thermal budget of the deposition processes without making concessions on the epitaxial layer quality. In this work we address the impact of ex-situ wet chemical cleans and in-situ pre-epi bake steps, which are required to obtain oxide free Si surfaces for epitaxial growth. The combination of defect measurements, Secondary Ion Mass Spectroscopy, photoluminescence, lifetime measurements, and electrical diode characterization gives a very complete overview of the performance of low-temperature pre-epi cleaning methods. Contamination at the epi/substrate interface cannot be avoided if the pre-epi bake temperature is too low. This interface contamination is traceable by the photoluminescence and lifetime measurements. It may affect device characteristics by enhanced leakage currents and eventually by yield issues due to SiGe layer relaxation or other defect generation. A comparison of state of the art 200 mm and 300 mm process equipment indicates that for the same thermal budgets the lowest contamination levels are obtained for the 300 mm equipments.
177
Authors: Kenichi Sano, Masayuki Wada, Frederik E. Leys, Roger Loo, Andriy Hikavyy, Paul W. Mertens, James Snow, Akira Izumi, Katsuhiko Miya, Atsuro Eitoku
Abstract: Strained silicon engineering was first used at the 90-nm node. Nowadays, a series of techniques has seen wide-spread use and many derivatives are available because of their ease of integration and cost-effective features [ , ]. As a main part of stressor technique, embedded SiGe-S/D technology is reported to improve the pMOSFET drive current [ , ].
173
Abstract: Single crystal Si, Si0.948Ge0.052 and Si0.66Ge0.34 diodes as well as Ge transistor structures
with high electroluminescence (EL) intensities in the region of interband transitions at room
temperature were fabricated by different techniques and their luminescence properties were studied.
By varying the Ge content in the solid solution, one can control the wavelength at the emission
maximum in the range of 1.1 - 1.8 μm. The integrated EL intensity varies by a factor of less than
two in the temperature ranges of 80 - 500 and 80 - 300 K for Si and SiGe LEDs, respectively. Si
LEDs can effectively operate, at least, up to ~200°C. The data analysis shows that recombination
involving excitons is the dominant mechanism of near-band-edge radiative recombination in all the
light-emitting structures at room temperature. Some of the structures have record values of EL
intensity and/or quantum efficiency, so they can be used as effective light emitters in Si
optoelectronics. In particular, Si LEDs were designed with a small p-n junction area of 8x10-3 mm2
and a radiation power of 0.3 mW. The record total emission power of 46 mW was achieved in solar
cell LEDs with an emitting surface area of 3 сm2. The internal quantum efficiencies of 0.5% and
0.3% were recorded in Si0.948Ge0.052 and Si0.66Ge0.34 LEDs at the wavelengths of 1.15 and 1.3 μm,
respectively. Room temperature near-band-edge EL was first observed in Ge structures.
79
Authors: Masataka Kase, Tomonari Yamamoto, Tomohiro Kubo
Abstract: The recent progress of advanced millisecond annealing (MSA) technology is discussed for
the application to the advanced logic LSI fabrication processes. The combination with conventional
spike annealing and MSA is proving practical to reduce the parasitic resistance and control the dopant
diffusion. The characterization result of advanced 45 nm generation devices including the channel
straining technology using embedded SiGe epitaxial growth is described with the arrangements of
process flow and annealing steps. MSA has a principle problem of the annealing temperature
variation depending on the optical properties of materials on the wafer surface because the annealing
process time is similar to the heat transfer time. In the device scale, the variation of temperature is
examined as the exact temperature with newly proposed evaluating methods used for the first time in
this industry.
325
Authors: Kenichi Sano, Frederik E. Leys, G. Dilliway, Roger Loo, Paul W. Mertens, James Snow, Akira Izumi, Atsuro Eitoku
243
Authors: Mathias Guder, Bernd O. Kolbesen, Cécile Delattre, C. Fischer, H. Schier, Gerald Wagner
79
Authors: Dong Won Hwang, Jae Seok Lee, Pil Kwon Jun, Yang Ku Lee, Seung Ki Chae
255