Improving Elmore Model of RLC Networks for Applying to SWCNT Interconnects

Article Preview

Abstract:

Elmore delay has been widely used as an analytical estimate of the interconnect delays in the performance-driven synthesis and layout of VLSI routing topologies. In this paper, Closed-form solutions for the 50% delay, rise time and overshoots of the step response of distributed Single Wall Carbon Nanotube (SWCNT), which consists RC and RLC parts, are presented for the first time. The proposed approach retains both efficiency and simplicity of the equivalent Elmore model with significantly improved accuracy, through surface fitting (3D) instead of curve fitting (2D).

You might also be interested in these eBooks

Info:

Periodical:

Pages:

5078-5084

Citation:

Online since:

October 2011

Export:

Price:

Permissions CCC:

Permissions PLS:

Сopyright:

© 2012 Trans Tech Publications Ltd. All Rights Reserved

Share:

Citation:

[1] Yehea I. Ismail, Eby G. Friedman, and José L. Neves Equivalent Elmore Delay for RLC Trees, IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems., vol. 19, no. 1, pp.83-97, January (2000).

DOI: 10.1109/43.822622

Google Scholar

[2] K. Banerjee and N. Srivastava, Are carbon nanotubes the future of VLSI interconnections?, Proc. IEEE/ACM Design Autom. Conf., p.809–814, (2006).

Google Scholar

[3] K. M. Liew, C. H. Wong, X. Q. He, and M. J. Tan, Thermal stability of single and multi-walled carbon nanotubes, in Phys. Rev. B, Condens. Matter, vol. 71,. pp.075-424, February (2005).

DOI: 10.1103/physrevb.71.075424

Google Scholar

[4] F. Kreupl, A. P. Graham, M. Liebau, G. S. Duesberg, R. Seidel, and E. Unger, Carbon nanotubes for interconnect applications, in IEDM Tech. Dig., p.683–686, (2004).

DOI: 10.1109/iedm.2004.1419261

Google Scholar

[5] J. P. Cui and W. -Y. Yin, Transfer Function and Compact distributed RLC Models of Carbon Nanotube Bundle Interconnets and their Applications, PIER 104, pp.69-83, (2010).

DOI: 10.2528/pier10031011

Google Scholar

[6] H. Li, W.Y. Yin, K. Banerjee, and J.F. Mao, Circuit Modeling and Performance Analysis of Multi-Walled Carbon Nanotube Interconnects, IEEE Trans. on electron devices, vol. 55, no. 6, june (2008).

DOI: 10.1109/ted.2008.922855

Google Scholar

[7] SoYoung Kim, S. Simon Wong, Closed-Form RC and RLC Delay Models Considering Input Rise Time, , IEEE Trans. On Circuit and Systems, vol. 54, no. 9, pp.2001-2010, September (2007).

DOI: 10.1109/tcsi.2007.902539

Google Scholar