A 8GHz Differential Comparator for Ultra High Speed ADC in 90nm CMOS Technology

Zhong Ying Zhu; Hui Hong; Shi Liang Li

doi:10.4028/www.scientific.net/AMM.513-517.4572

Paper Titles

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Research on Sensitive Ports under the Action of Different ESD Initial Injected Voltage of Typical High-Frequency Low-Noise Silicon Bipolar Transistors
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Research on Indirect Charging Radio Frequency Explosive Magnetic Flux Compression Generator
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A 8GHz Differential Comparator for Ultra High Speed ADC in 90nm CMOS Technology
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Design of a Low Power Multi-Channel 10Bit SAR ADC
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A Low Power SiGe-BiCMOS LNA for COMPASS Applications
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A 6-Bit 5GS/s Pseudo-Thermometer Segmented CMOS DAC
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A Temperature Compensation Circuit within Constant Current Charging Cycle
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HomeApplied Mechanics and MaterialsApplied Mechanics and Materials Vols. 513-517A 8GHz Differential Comparator for Ultra High...

A 8GHz Differential Comparator for Ultra High Speed ADC in 90nm CMOS Technology

Abstract:

A high speed, low offset fully differential comparator for high-speed analog-to-digital converter which can work at a sampling rate of 8GS/s is presented in this paper. The three-stage pre-amplifiers in the improved comparator structure is proposed to ameliorate its gain. The positive feedback regeneration circuit and the improved output buffer are used to ameliorate the comparator bandwidth. Operating with an input sine signal of 1GHz frequency, the circuit can oversample up to 8GS/s with 5bits of resolution. The simulated offset voltage of the comparator by Monte Carlo at 8GHz clock is 5.09mV.

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Periodical:

Applied Mechanics and Materials (Volumes 513-517)

Pages:

4572-4575

DOI:

https://doi.org/10.4028/www.scientific.net/AMM.513-517.4572

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Online since:

February 2014

Authors:

Zhong Ying Zhu*, Hui Hong, Shi Liang Li

Keywords:

Analog-to-Digital Converter (ADC), Comparator, Preamplifier

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References

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