Probing Drain Current with Vertical and Horizontal Electrical Fields under Temperature Stress on CLC TFTs

Abstract:

Thin-film transistors (TFT) usually exhibit non-uniform electrical characteristics fabricated by the identical process because of the formation of the grain boundary traps, bulk grain traps, interface states and some defects on channel region. All the traps and defects affecting the electrical characteristics of TFTs can be thermally and electrically activated. In this study, the temperature effect accompanying the horizontal and vertical electric fields stressing on continuous-wave green laser-crystallized (CLC) single-grain-like poly silicon TFTs (poly-Si TFTs), presenting the excellent effective electron mobility, up to 530 cm^2/V-s, was firstly investigated.

• Periodical: Advanced Materials Research (Volumes 314-316)
• Pages: 1922-1925
• DOI: https://doi.org/10.4028/www.scientific.net/AMR.314-316.1922
• Online since: August 2011
• Authors: Mu Chun Wang, Hsin Chia Yang
• Keywords: CLC, Interface Trap States, Mobility, Stress, Temperature, TFT

References

[1] J. M. Shieh,
et al.: Appl. Phy. Lett., 92, (2008), p.063503

[2] T. Mizuki, et al.: IEEE Trans. ED., 51, (2004), p.204

[3] Y. Toyota, et al.: IEEE Trans. ED.,52, (2005), p.1766

[4] G.A. Armstrong, et al.: IEEE EDL., 18, (1997), p.315

[5] Y. H. Tai, et al.: Solid-State Electronics, 51, (2007), p.1092