The Design of CIFF Structure Three-Order Switched-Capacitor Sigma-Delta Modulator

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This paper presents the design and implementation of a single-loop three-order switched-capacitor sigma-delta modulator(SDM) with a standard 0.18um CMOS technology. A current optimization technique is utilized in proposed design to reduce the power of operational transconductance amplifier(OTA).Using a chain of Integrators with weighted feed-forward summation(CIFF) structure and optimized single-stage class-A OTA with positive feed-back to minimize the power consumption. The SDM has been presented with an over-sampling ratio of 128,clock frequency 6.144MHz,24kHz band- width, and achieves a peak SNR of 100dB,103dB dynamic range. The whole circuits consume 2.87mW from a single 1.8V supply voltage.

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Advanced Materials Research (Volumes 433-440)

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5727-5732

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January 2012

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© 2012 Trans Tech Publications Ltd. All Rights Reserved

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