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A 8-Bit DAC Design in AMS 0.35 μm CMOS Process for High-Speed Communication Systems

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Abstract:

DAC architecture that is designed in this research can be applied in high-speed communication systems. DAC architecture that is presented in this research is based on the R2R ladder method. The design requires three main components, namely switches, resistors, and op-amp. This method has been applied to the 8-bit DAC for high-speed communication system using AMS technology 0.35 μm CMOS process. Resistors that are used in R2R DAC is replaced by transistors, so that the size is smaller and easier layout in the manufacturing process. Mentor graphics software is used as a simulator of the design. DAC design with 8-bit resolution in this research can be applied to the speed up to 1000 Msps. In the way the design can be categorized as high-speed DAC that can be used in a communication system.

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Periodical:

Advanced Materials Research (Volume 646)

Pages:

178-183

DOI:

https://doi.org/10.4028/www.scientific.net/AMR.646.178

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Online since:

January 2013

Authors:

Veronica Ernita Kristianti, Hamzah Afandi, Eri Prasetyo Wibowo, Djoko Purnomo

Keywords:

CMOS, Digital-to-Analog Converter (DAC), MOS Switch, Operational Amplifier (Op-Amp)

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© 2013 Trans Tech Publications Ltd. All Rights Reserved

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