Design of Direct Digital Synthesizer Based on FPGA

Cai Hong Liu; Jin Shui Ji; Ai Qin Qi; Wei Zhang

doi:10.4028/www.scientific.net/AMR.748.829

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HomeAdvanced Materials ResearchAdvanced Materials Research Vol. 748Design of Direct Digital Synthesizer Based on FPGA

Design of Direct Digital Synthesizer Based on FPGA

Abstract:

Traditional designs of high bandwidth frequency synthesizers employ the use of a phase locked-loop. A direct digital synthesizer (DDS) provides many significant advantages over the PLL approaches. The thesis emphasizing discusses the designing of DDS basing on FPGA. DDS is made up of the phrase accumulator and sine ROM looking-up table, which is realized by functional EAB chip. And through setting different initial accumulator value and initial phrase value, the difference of phrase between the two sine signals can be changed. As a result, two serials of sine signals with changeable digital frequency, phrase and magnitude are produced. The simulate results show that logic in FPGA is consistent with the requirements.

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Periodical:

Advanced Materials Research (Volume 748)

Pages:

829-832

DOI:

https://doi.org/10.4028/www.scientific.net/AMR.748.829

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Online since:

August 2013

Authors:

Cai Hong Liu, Jin Shui Ji, Ai Qin Qi, Wei Zhang

Keywords:

Direct Digital Synthesizer, Field-Programmable Gate Array (FPGA), VHDL

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