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A Novel R-2R Current-Mode DAC Used for Digital-Calibrated ADC
Abstract:
In this paper, a kind of novel DAC architecture is proposed. Compared to the traditional DAC architecture, the proposed is a multistage one. In order to improve precision, we use a kind of feedback bias circuit, which can minimize the effect of the base currents. A 16-bit DAC transistor-level circuit is implemented in 0.18um SiGe process. The simulation results show that the DAC using the proposed architecture has higher resolution, and better static and dynamic performances than the traditional one.
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2479-2482
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Online since:
August 2013
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© 2013 Trans Tech Publications Ltd. All Rights Reserved
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