A Four-Quadrant Analog Multiplier Based on CMOS Source Coupled Pair

Wei Ping Chen; Tian Yang Wang; Hong Lei Xu; Xiao Wei Liu

doi:10.4028/www.scientific.net/KEM.483.487

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HomeKey Engineering MaterialsKey Engineering Materials Vol. 483A Four-Quadrant Analog Multiplier Based on CMOS...

A Four-Quadrant Analog Multiplier Based on CMOS Source Coupled Pair

Abstract:

A novel structure for CMOS four-quadrant analog multiplier is presented. The multiplier is based on the square law of MOSFET. To enlarge the input impedance and improve the linearity, CMOS source coupled pair was employed. Also active attenuator was used to enhance the input range. Compared with the traditional multipliers based on Gilbert cell, the proposed circuit features high linearity, high input range. Circuit simulation using HSPICE with 0.5μm CMOS technology shows that under ±2.5V supply the proposed multiplier provides linear range of more than 50% of the voltage supply, THD is 0.3% at 100kHz and 0.8% at 1MHz, -3dB bandwidth is 2.5MHz, and the power consumption is 5mW.

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Periodical:

Key Engineering Materials (Volume 483)

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487-491

DOI:

https://doi.org/10.4028/www.scientific.net/KEM.483.487

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Online since:

June 2011

Authors:

Wei Ping Chen, Tian Yang Wang, Hong Lei Xu, Xiao Wei Liu

Keywords:

Attenuator, CMOS Source Coupled Pair, Multiplier

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References

[1] Mahmoud S.A. : CMOS Fully Differential CMOS Four-Quadrant Analog Multiplier. International Conference on Microelectronics 2008, pp.27-30.

DOI: 10.1109/icm.2008.5393543

Google Scholar

[2] Naderi A. , Mojarrad H. and Ghasemzadeh H. : Four-quadrant CMOS Analog Multiplier Based on New Current Squarer Circuit with High-Speed. IEEE EUROCON 2009, pp.282-287.

DOI: 10.1109/eurcon.2009.5167644

Google Scholar

[3] C. Abel, S. Sakurai, F. Larson and M. Ismail: Four-Quadrant CMOS/BiCMOS Multipliers Using Linear-Region MOS Transistors. Proc. of 1994 IEEE International Symposium on Circuits and Systems, pp.273-276.

DOI: 10.1109/iscas.1994.409358

Google Scholar

[4] F. A. Pereira, M.C. G de Oliveira and A.I.A. Cunha: CMOS Analog Current-Mode Multiplier Based on the Advanced Compact MOSFET Model. Proc. ISCAS 2005, Vol. 2, pp.1020-1023.

DOI: 10.1109/iscas.2005.1464764

Google Scholar

[5] Machado MB, Araujo Cunha AI and Montoro CG: Transconductance-Based CMOS Analog Multiplier. Circuits and Systems and TAISA Conference (2008), pp.367-370.

DOI: 10.1109/newcas.2008.4606397

Google Scholar

[6] S.C. Qin, R.L. Geiger: A ±5V CMOS Analog Multiplier. IEEE J. Solid-State Circuits, Vol. SC-22-6 (1987), pp.1143-1146.

DOI: 10.1109/jssc.1987.1052866

Google Scholar

[7] Z.H. Wang. A CMOS Four-Quadrant Analog Multiplier with Single-Ended Voltage Output and Improved Temperature Performance. IEEE J. Solid-State Circuits, Vol. 26-9 (1991), pp.1293-1301.

DOI: 10.1109/4.84947

Google Scholar