Thermoelectric Device Based on Vertical Silicon Nanowires for On-Chip Integration

Abstract:

A fabricating process of prototype thermoelectric device based on vertical silicon nanowires (SiNWs) for on-chip integration was presented. The SiNWs with diameter of 200 nm and height of 1 μm were fabricated by electron beam lithography and inductively coupled plasma etching. The gaps between the NWs were filled by the spin-on glass, which isolated the top and bottom electrodes. A serpentine platinum resistance thermometer coil was formed on the NWs to create temperature gradient across the NWs and measure the temperature of the top of NWs. I-V characteristics of the vertical device before and after annealing were measured. The nonlinear I-V curves were obtained, but the annealed one demonstrated 1000-fold reduction in resistance than the unannealed one.

• Periodical: Key Engineering Materials (Volumes 609-610)
• Pages: 789-795
• DOI: https://doi.org/10.4028/www.scientific.net/KEM.609-610.789
• Online since: April 2014
• Authors: Zhen Wang, Yang Yang Qi, Ming Liang Zhang, An Ji, Fu Hua Yang, Xiao Dong Wang*
• Keywords: Fabricate, Nanowire, Silicon, Thermoelectric

References

[1] C. L. Chen, Y. Y. Chen, S. J. Lin, J. C. Ho, P. C. Lee, C. D. Chen and S. R. Harutyunyan, Fabrication and Characterization of Electrodeposited Bismuth Telluride Films and Nanowires, J. Phys. Chem. C, 114 (2010) 3385-3389.

DOI: 10.1021/jp909926z

[2] E. J. Menke, M. A. Brown, Q. Li, J. C. Hemminger and R. M. Penner, Bismuth telluride (Bi2Te3) nanowires: Synthesis by cyclic electrodeposition/stripping, thinning by electrooxidation, and electrical power generation, Langmuir, 22 (2006).

DOI: 10.1021/la061275g

[3] Z. L. Chai, Z. P. Peng, C. Wang and H. J. Zhang, Synthesis of polycrystalline nanotubular Bi2Te3, Mater. Chem. Phys., 113 (2009) 664-669.

DOI: 10.1016/j.matchemphys.2008.07.121

[4] A. Bali, E. Royanian, E. Bauer, P. Rogl and R. C. Mallik, Thermoelectric properties of PbTe with encapsulated bismuth secondary phase, J. Appl. Phys., 113 (2013) 123707.

DOI: 10.1063/1.4796148

[5] S. Mishra, S. Satpathy and O. Jepsen, Electronic structure and thermoelectric properties of bismuth telluride and bismuth selenide, J. Phys.: Condens. Matter, 9 (1997) 461-470.

DOI: 10.1088/0953-8984/9/2/014

[6] L. D. Hicks and M. S. Dresselhaus, Thermoelectric figure of merit of a one-dimensional conductor, Phys. Rev. B, 47 (1993) 16631-16634.

DOI: 10.1103/physrevb.47.16631

[7] L. D. Hicks and M. S. Dresselhaus, Effect of quantum-well structures on the thermoelectric figure of merit, Phys. Rev. B, 47 (1993) 12727-12731.

DOI: 10.1103/physrevb.47.12727

[8] Y. Qi, Z. Wang, M. Zhang, F. Yang and X. Wang, Thermoelectric devices based on one-dimensional nanostructures, J. Mater. Chem. A, 1 (2013) 6110-6124.

[9] N. Yang, X. Xu, G. Zhang and B. Li, Thermal transport in nanostructures, Aip Advances, 2 (2012) 041410.

[10] E. Krali and Z. A. K. Durrani, Seebeck coefficient in silicon nanowire arrays, Appl. Phys. Lett., 102 (2013) 143102.

DOI: 10.1063/1.4800778

[11] A. I. Hochbaum, R. Chen, R. D. Delgado, W. Liang, E. C. Garnett, M. Najarian, A. Majumdar and P. Yang, Enhanced thermoelectric performance of rough silicon nanowires, Nature, 451 (2008) 163-167.

DOI: 10.1038/nature06381

[12] A. I. Boukai, Y. Bunimovich, J. Tahir-Kheli, J. K. Yu, W. A. Goddard, 3rd and J. R. Heath, Silicon nanowires as efficient thermoelectric materials, Nature, 451 (2008) 168-71.

DOI: 10.1038/nature06458

[13] J. P. Feser, J. S. Sadhu, B. P. Azeredo, K. H. Hsu, J. Ma, J. Kim, M. Seong, N. X. Fang, X. L. Li, P. M. Ferreira, S. Sinha and D. G. Cahill, Thermal conductivity of silicon nanowire arrays with controlled roughness, J. Appl. Phys., 112 (2012).

DOI: 10.1063/1.4767456

[14] Y. Qi, Z. Wang, M. Zhang, F. Yang and X. Wang, A Processing Window for Fabricating Heavily Doped Silicon Nanowires by Metal-Assisted Chemical Etching, J. Phys. Chem. C, 117 (2013) 25090-25096.

DOI: 10.1021/jp407720e

[15] M. -L. Zhang, K. -Q. Peng, X. Fan, J. -S. Jie, R. -Q. Zhang, S. -T. Lee and N. -B. Wong, Preparation of large-area uniform silicon nanowires arrays through metal-assisted chemical etching, J. Phys. Chem. C, 112 (2008) 4444-4450.

DOI: 10.1021/jp077053o

[16] Z. Huang, H. Fang and J. Zhu, Fabrication of Silicon Nanowire Arrays with Controlled Diameter, Length, and Density, Adv. Mater., 19 (2007) 744-748.

DOI: 10.1002/adma.200600892

[17] K. Peng, M. Zhang, A. Lu, N. B. Wong, R. Zhang and S. T. Lee, Ordered silicon nanowire arrays via nanosphere lithography and metal-induced etching, Appl. Phys. Lett., 90 (2007) 163123.

DOI: 10.1063/1.2724897