Suppression of Short Channel Effects for a SiC MOSFET Based on the S-MOS Cell Concept

Munaf T. Rahimo; Iulian Nistor; David Green

doi:10.4028/p-g4w5h5

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HomeKey Engineering MaterialsKey Engineering Materials Vol. 945Suppression of Short Channel Effects for a SiC...

Suppression of Short Channel Effects for a SiC MOSFET Based on the S-MOS Cell Concept

Abstract:

This paper investigates the short channel effects (SCE) of the recently proposed Singular Point Source MOS (S-MOS) SiC MOSFET. The study was carried out using 2D and 3D TCAD simulations for a planar, trench and S-MOS 1200V SiC MOSFETs for the IV output characteristics up to 1200V and under short circuit transient conditions. The S-MOS device shows no SCE up to the rated voltage when compared to reference planar and trench devices which exhibit strong SCE. This is due to the appropriate P++ protection of the N++ source and the electric field shielding due to the narrow mesa dimensions between orthogonal trenches where the channel is located.

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Periodical:

Key Engineering Materials (Volume 945)

Pages:

83-89

DOI:

https://doi.org/10.4028/p-g4w5h5

Citation:

Cite this paper

Online since:

May 2023

Authors:

Munaf T. Rahimo*, Iulian Nistor, David Green

Keywords:

Short Channel Effect, SiC MOSFET

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Creative Commons CC BY 4.0

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* - Corresponding Author

References

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DOI: 10.4028/www.scientific.net/msf.897.649

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[4] M.T. Rahimo, et al., "Advanced 1200V SiC MOSFET based on Singular Point Source MOS (S-MOS) Technology" Materials Science Forum, Vol. 1062, 2022, p.539–543.

DOI: 10.4028/p-u88313

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