The Effect on the Interface and Reliability of SiC MOS by Ar/O2 Annealing

Zhi Peng Luo; Cai Ping Wan; Jing Hua Xia; Zhi Jin; Heng Yu Xu

doi:10.4028/www.scientific.net/MSF.1014.102

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HomeMaterials Science ForumMaterials Science Forum Vol. 1014The Effect on the Interface and Reliability of SiC...

The Effect on the Interface and Reliability of SiC MOS by Ar/O₂ Annealing

Abstract:

In this paper, SiC MOS capacitors were fabricated and annealed in Ar/O₂ = 9:1 ambient with different temperature, and the annealing effects on the reliability and performance of SiC MOS capacitance were investigated. We found that annealing in Ar/O₂ ambient is capable to improve the reliability of gate oxide. When annealing in higher temperature, defects near SiO₂/SiC interface are reduced, but the gate reliability deteriorated. It is difficult to obtain the best performance and reliability under the same conditions. There is a trade-off between D_it and reliability to adjust the annealing conditions.

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Periodical:

Materials Science Forum (Volume 1014)

Pages:

102-108

DOI:

https://doi.org/10.4028/www.scientific.net/MSF.1014.102

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Online since:

November 2020

Authors:

Zhi Peng Luo, Cai Ping Wan, Jing Hua Xia, Zhi Jin, Heng Yu Xu*

Keywords:

Ar Annealing, Interface State, MOS, Oxide Reliability, SiC

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