Hypothesis to Explain Threshold Drift due to Dynamic Bipolar Gate Stress

Abstract:

We supply a hypothesis that explains threshold voltage (V_th) drift under dynamic bipolar gate stress in SiC-MOSFETs, postulating that ionized donor-like interface traps in the lower half of the bandgap, give rise to an increased internal electric field at each rising edge of a gate voltage pulse. The enhancement of the internal electric field may be viewed as a V_th -reduction, and we devised different experiments to assess this V_th -reduction. Comparing V_th -drift rate using different pulse shapes in dynamic bipolar gate stress tests, we estimated a temporary V_th -reduction in the order of 15 V within 200 ns after the rising edge. Measuring the drain-source current peak 200 ns after the rising edge of a rectangular pulse, gives an estimate for the V_th -reduction of 5.5 V. To resolve this discrepancy, we postulate that in inversion, positive traps are effectively screened such that the impact on the channel is spatially restricted and smaller than the channel length. Channel current will only flow where positive charges induce a percolation path between drain and source, reducing the apparent V_th -reduction in the current based measurement.

• Periodical: Materials Science Forum (Volume 1090)
• Pages: 159-164
• DOI: https://doi.org/10.4028/p-bt3i95
• Online since: May 2023
• Authors: Dick Scholten*, Jens Baringhaus, Daniel Krebs, Stefan Noll
• Keywords: 4H-SiC MOSFET, ACBTI, GSI, Interface Traps, Threshold Voltage, Vth-Drift, Vth-Shift

References

[1] P. Salmen et al., "Gate-switching-stress test: Electrical parameter stability of SiC MOSFETs in switching operation," Microelectronics Reliability, vol. 135, p.114575, Aug. 2022.

DOI: 10.1016/j.microrel.2022.114575

[2] D. B. Habersat and A. J. Lelis, "AC-Stress Degradation and Its Anneal in SiC MOSFETs," IEEE Transactions on Electron Devices, p.1–6, 2022.

DOI: 10.1109/ted.2022.3190815

[3] H. Jiang, X. Zhong, G. Qiu, L. Tang, X. Qi and L. Ran, Dynamic Gate Stress Induced Threshold Voltage Drift of Silicon Carbide MOSFET, in IEEE Electron Device Letters, vol. 41, no. 9, pp.1284-1287, Sept. 2020.

DOI: 10.1109/LED.2020.3007626

[4] X. Zhong, H. Jiang, G. Qui, "Bias Temperature Instability of Silicon Carbide Power MOSFET Under AC Gate Stresses", IEEE Transactions on Power Electronics, Vol. 37, p.1998–2008. 2022.

DOI: 10.1109/tpel.2021.3105272

[5] "Guideline for Evaluating Gate Switching Instability of Silicon Carbide Metal-Oxide-Semiconductor Devices for Power Electronic Conversion", JEP195, Published: Feb 2023.