Improved Planar MOS Barrier Schottky (PMBS) Rectifier with High-k Dielectrics

Abstract:

In this paper, an improved planar MOS barrier Schottky (PMBS) rectifier is proposed which utilizes the PECVD deposited high-k semi-insulating polycrystalline silicon (SIPOS) as the MOS area gate dielectrics for the first time. By adopting the high-k SIPOS as the MOS gate dielectrics, the peak electric field at the interface betwwen dielectrics layer and SiC can be significantly relieved and the device reliability can obviously enhanced without considerable degradation of on-state characteristics. With the optimized the thickness of the SIPOS film, the breakdown voltage (BV) of 1500V for the fabricated device was achieved, which is approximately corresponds to 85% of the theoretical parallel plane breakdown voltage value calculated from the used epilayer structure. And the specific on-state resistance (R_SP-ON) is about 4.2mΩ•cm². The corresponding figure-of-merit of VB²/ R_SP-ON for the proposed device is 535.7MW/cm².

• Periodical: Materials Science Forum (Volumes 821-823)
• Pages: 906-909
• DOI: https://doi.org/10.4028/www.scientific.net/MSF.821-823.906
• Online since: June 2015
• Authors: Qing Wen Song*, Yu Ming Zhang, Xiao Yan Tang, Yu Hu Wang, Hao Yuan, Yi Men Zhang
• Keywords: 4H-SiC, High-k, PMBS

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