SiC Vertical-Channel n- and p-JFETs Fully Fabricated by Ion Implantation

Mitsuaki Kaneko; Ulrike Grossner; Tsunenobu Kimoto

doi:10.4028/www.scientific.net/MSF.963.841

Paper Titles

A Study on Fastening the Switching Speed for Wide Bandgap Semiconductor Based Super Cascode
p.823

Improving 5V Digital 4H-SiC CMOS ICs for Operating at 400°C Using PMOS Channel Implantation
p.827

High Temperature High Current Gain IC Compatible 4H-SiC Phototransistor
p.832

4H-SiC Trench pMOSFETs for High-Frequency CMOS Inverters
p.837

SiC Vertical-Channel n- and p-JFETs Fully Fabricated by Ion Implantation
p.841

Improved Offset Voltage Stability of 4H-SiC CMOS Operational Amplifier by Increasing Gamma Irradiation Resistance
p.845

Comparative Study of Developed 1200V/50A Full SiC IEMOS and VMOS Power Module
p.851

An Efficient Simulation Methodology to Quantify the Impact of Parameter Fluctuations on the Electrothermal Behavior of Multichip SiC Power Modules
p.855

6.5 kV Si/SiC Hybrid Power Module Technology
p.859

HomeMaterials Science ForumMaterials Science Forum Vol. 963SiC Vertical-Channel n- and p-JFETs Fully...

SiC Vertical-Channel n- and p-JFETs Fully Fabricated by Ion Implantation

Abstract:

Silicon carbide (SiC) n-and p-channel junction field effect transistors (JFETs) with vertical channels were fabricated by direct ion implantation into a high-purity semi-insulating 4H-SiC substrate in order to further develop the path towards complementary JFET integrated circuits for applications in harsh environments. Compared with the conventional structure (lateral channel), the proposed structure is suitable for integration and inherently has a high transconductance owing to the double-gate configuration. The threshold voltage (V_th) can be controlled by mask design, while V_th in the conventional structure is solely determined by the ion implantation conditions. We demonstrate the transistor operation of the vertical-channel n-and p-channel JFETs fully fabricated by ion implantation.

You might also be interested in these eBooks

Silicon Carbide and Related Materials 2018

View Preview

Info:

Periodical:

Materials Science Forum (Volume 963)

Pages:

841-844

DOI:

https://doi.org/10.4028/www.scientific.net/MSF.963.841

Citation:

Cite this paper

Online since:

July 2019

Authors:

Mitsuaki Kaneko*, Ulrike Grossner, Tsunenobu Kimoto

Keywords:

Integrated Circuit (IC), Ion Implantation, JFET

Export:

RIS, BibTeX

Price:

Permissions CCC:

Request Permissions

Permissions PLS:

Request Permissions

Сopyright:

Citation:

* - Corresponding Author

References

[1] C.-M. Zetterling, Present and future applications of Silicon Carbide devices and circuits,, Proc. IEEE CICC, pp.1-8, (2012).

Google Scholar

[2] S.-H. Ryu, K. T. Kornegay, J. A. Cooper, and M. R. Melloch, Digital CMOS IC's in 6H-SiC operating on a 5-V power supply,, IEEE Trans. Electron Devices, vol. 45, no. 1, pp.45-53, (1998).

DOI: 10.1109/16.658810

Google Scholar

[3] P. G. Neudeck, D. J. Spry, L. Chen, N. F. Prokop, and M. J. Krasowski, Demonstration of 4H-SiC Digital Integrated Circuits Above 800 °C,, IEEE Electron Device Lett., vol. 38, no. 8, pp.1082-1085, (2017).

DOI: 10.1109/led.2017.2719280

Google Scholar

[4] A. K. Kapoor, W. Zhang, S. Sonkusale, Y. Liu, P. Gregory, U. C. Sridharan, C. Stager, N. Eib, Z. Xie, M. Vora, J. Prasad, D. Thummalapally, and R. Chou, omplementary logic with 60 nm poly gate JFET for 0.5 V operation,, Electron. Lett., vol. 46, no. 11, pp.783-784, (2010).

DOI: 10.1049/el.2010.0742

Google Scholar

[5] M. Kaneko and T. Kimoto, High-Temperature Operation of n- and p-Channel JFETs Fabricated by Ion Implantation Into a High-Purity Semi-Insulating SiC Substrate,, IEEE Electron Device Lett., vol. 39, no. 5, pp.723-726, (2018).

DOI: 10.1109/led.2018.2822261

Google Scholar