Silicon & beyond CMOS: The Path of Advanced Electronic Structure Engineering for Low-Voltage Transistors

Aaron Thean

doi:10.4028/www.scientific.net/SSP.195.3

Paper Titles

Preface, Committees and Acknowledgements

Silicon & beyond CMOS: The Path of Advanced Electronic Structure Engineering for Low-Voltage Transistors
p.3

Cleaning Technology for Advanced Devices beyond 20 nm Node
p.7

Dummy Oxide Removal in High-K Last Process Integration how to Avoid Silicon Corrosion Issue
p.13

Implanted Photoresist Remover for Advanced Nodes Including SiGe, Ge and High K-Metals
p.17

Development of a Integrated Dry/Wet Hybrid Cleaning System
p.21

New Chemical Vapor Delivery Systems for Surface Cleaning
p.25

Removal of UV Cured Resin Using Hybrid Cleaning Method
p.30

Selective Nickel Silicide Wet Etchback Chemistry for Low Temperature Anneal Process
p.37

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Silicon & beyond CMOS: The Path of Advanced Electronic Structure Engineering for Low-Voltage Transistors

Abstract:

With the continuing growth of data bandwidth, next-generation information technology demands circuit and device scaling to meet performance, form-factor and cost needs. With increase performance and circuit density, reduction in power dissipation has become paramount for both high-performance and low-power applications. In the case of high-performance systems, heat dissipation becomes the thermal bottle neck. Limited by battery, low-power mobile applications ration energy to maintain user multimedia experience while on the move. Lowering supply voltage (V_dd) is becoming the major system enabler to manage the power challenges.