Paper Titles
Preface, Committees and Acknowledgements
Silicon & beyond CMOS: The Path of Advanced Electronic Structure Engineering for Low-Voltage Transistors
p.3
Cleaning Technology for Advanced Devices beyond 20 nm Node
p.7
Dummy Oxide Removal in High-K Last Process Integration how to Avoid Silicon Corrosion Issue
p.13
Implanted Photoresist Remover for Advanced Nodes Including SiGe, Ge and High K-Metals
p.17
Development of a Integrated Dry/Wet Hybrid Cleaning System
p.21
New Chemical Vapor Delivery Systems for Surface Cleaning
p.25
Removal of UV Cured Resin Using Hybrid Cleaning Method
p.30
Selective Nickel Silicide Wet Etchback Chemistry for Low Temperature Anneal Process
p.37

Cleaning Technology for Advanced Devices beyond 20 nm Node

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Abstract:

Several attempts have recently been made to use novel high-k dielectric materials, such as AlxOy, HfxAlyOz, HfxSiyOz, and HfxOy, to improve electrical device characteristics of advanced devices. Moreover, it is becoming increasingly important in the ULSI manufacturing process to suppress contamination by metal or particles from the wafer backside or edge. This paper reviews the wafer backside/edge control technology for suppression of metal contamination.

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Periodical:

Solid State Phenomena (Volume 195)

Pages:

7-12

DOI:

https://doi.org/10.4028/www.scientific.net/SSP.195.7

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Online since:

December 2012

Authors:

Yoshihiro Ogawa

Keywords:

Contamination Control, Drying, Pattern Damage, Precise Etching

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© 2013 Trans Tech Publications Ltd. All Rights Reserved

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