4H-SiC Full Wafer Mapping Image of CMP-Finished Sub-Surface Damage by Laser Light Scattering

Daichi Dojima; Daichi Dansako; Mizuho Maki; Kohei Toda; Tadaaki Kaneko

doi:10.4028/p-1i3w12

Paper Titles

Improvement of the Conformational Stability of 150 mm 4H SiC Wafers
p.15

High Quality Single Crystal Recrystallization of Thin 4H-SiC Films Deposed by PVD Techniques, a way for New Emerging Fields
p.21

Effect of Sub-Surface Damage Layer Removal by Sublimation Etching of 4H-SiC Bulk Wafers on PL Imaging of Crystal Defect Visibility
p.29

Temperature Gradient Control with an Air-Pocket Design for Growth of High Quality SiC Crystal
p.37

4H-SiC Full Wafer Mapping Image of CMP-Finished Sub-Surface Damage by Laser Light Scattering
p.43

Investigation of the Nucleation Process during the Initial Stage of PVT Growth of 4H-SiC
p.51

Al Implantation in Sic; Where Will the Ions Come to Rest?
p.57

Analysis of Transmission Performance for Fine Pitch Interconnect
p.67

Interfacial Delamination Validation on Fan-Out Wafer-Level Package Using Finite Element Method
p.73

HomeSolid State PhenomenaSolid State Phenomena Vol. 3434H-SiC Full Wafer Mapping Image of CMP-Finished...

4H-SiC Full Wafer Mapping Image of CMP-Finished Sub-Surface Damage by Laser Light Scattering

Abstract:

Developing an observation method for distributing sub-surface damage (SSD) on large-diameter 4H-SiC bulk wafers formed by mechanical processing can significantly improve the epitaxial and bulk growth processes. This study used a novel laser light scattering (LLS) technique to observe SSD distribution on a 6-inch 4H-SiC (0001) wafer. As a result, scattering intensity distributions similar to the grinding and lap-polishing traces and the shape of the jig used to hold the wafer during polishing were observed on the CMP-finished SiC wafer surface. Since the surface topography of the area was flat by a laser microscopy observation, it is assumed that this is the SSD. This result suggests that LLS can be a wafer inspection method that can observe SSD distribution. In addition, wafer inspection using LLS has demonstrated that it is possible to observe scratches, particles, and macrostep bunching. This method is anticipated to allow further optimization of the mechanical processing and thermal etching process prior to CVD epitaxial growth.

By email View Pdf

You might also be interested in these eBooks

International Conference on Silicon Carbide and Related Materials ICSCRM 2022

View Preview

Silicon Carbide Wafer Manufacturing, Optoelectronic and Electronic Devices and Technologies

View Preview

Info:

Periodical:

Solid State Phenomena (Volume 343)

Pages:

43-50

DOI:

https://doi.org/10.4028/p-1i3w12

Citation:

Cite this paper

Online since:

May 2023

Authors:

Daichi Dojima*, Daichi Dansako, Mizuho Maki, Kohei Toda, Tadaaki Kaneko

Keywords:

Chemical Mechanical Polishing (CMP), Epitaxial Growth, Laser Light Scattering, Mechanical Process, Sublimation Etching, Sub-Surface Damage, Wafer Inspection

Export:

RIS, BibTeX

Permissions:

Creative Commons CC BY 4.0

Citation:

* - Corresponding Author

References

[1] X. Ma, M. Parker, and T.S. Sudarshan, Nondestructive defect delineation in SiC wafers based on an optical stress technique, Appl. Phys. Lett. 80 (2002) 3298-3300.

DOI: 10.1063/1.1469659

Google Scholar

[2] G. Chung, I. Manning, A. Soukhojak, M. Gave and C Lee, Decoration and Density Increase of Dislocations in PVT-Grown SiC Boules with Post-Growth Thermal Processing, Materials Science Forum. 1062 (2022) 246-250.

DOI: 10.4028/p-43627c

Google Scholar

[3] M. Odawara, K. Kamei, Y. Miyasaka, T. Yamashita, S. Takahashi, Y. Kageshima, K. Momose, H. Osawab, and T. Sato, Defects grouping and characterizations of PL-imaging methods for 4H-SiC epitaxial layers, Materials Science Forum. 778-780 (2014) 382-385.

DOI: 10.4028/www.scientific.net/msf.778-780.382

Google Scholar

[4] H. Sako, H. Matsuhata, M. Sasaki, M. Nagaya, T. Kido, K. Kawata, T. Kato, J. Senzaki, M. Kitabatake, and H. Okumura, Micro-structural analysis of local damage introduced in subsurface regions of 4H-SiC wafers during chemo-mechanical polishing, J. Appl. Phys. 119 (2016) 135702.

DOI: 10.1063/1.4945017

Google Scholar

[5] M. Sasaki, H. Matsuhata1, K Tamura, H Sako, K Kojima, H Yamaguchi, and M Kitabatake, Synchrotron X-ray topography analysis of local damage occurring during polishing of 4H-SiC wafers, J. Appl. Phys. 54 (2015) 091301.

DOI: 10.7567/jjap.54.091301

Google Scholar

[6] R. Anzalone, N. Piluso, M. Salanitri, S. Lorenti, G. Arena, and S. Coffa, Hydrogen Etching Influence on 4H-SiC Homo-Epitaxial Layer for High Power Device, Mater. Sci. Forum. 897 (2016) 71-74.

DOI: 10.4028/www.scientific.net/msf.897.71

Google Scholar

[7] Kwansei Gakuin University, Toyota Tsusho Corporation. (March 1, 2021). Kwansei Gakuin University and Toyota Tsusho Develop Innovative Process that Achieves "Zero Defects" in 6-Inch SiC Substrates - Supply of Samples to Device Manufacturers to Begin to Facilitate Early Mass Production [Press release]. https://global.kwansei.ac.jp/cms/kwansei_en/researchspotlight/202110 20_プレスリリース英文02.pdf

DOI: 10.46679/978819484836310

Google Scholar

[8] A. Fiocchi, C. A. Fortulan, L. Eduardo and A. Sanchez, Ultra-precision face grinding with constant pressure, lapping kinematics, and SiC grinding wheels dressed with overlap factor, Int J Adv Manuf Technol. 79 (2015) 1531-1543.

DOI: 10.1007/s00170-015-6933-5

Google Scholar

[9] K. Moeggenborg, M. Ju, Polish Scratch Simulation vs. Polish Tool Type, Mater. Sci. Forum. 1062 (2022) 175-179.

DOI: 10.4028/p-wkn17q

Google Scholar

[10] X. Y. Wang, Y Li, S. J. Li, Study on the Impact of the Cutting Process of Wire Saw on SiC Wafers, Appl. Mech. Mater. 120 (2012) 593-597.

DOI: 10.4028/www.scientific.net/amm.120.593

Google Scholar