Papers by Author: Dominique Tournier

Abstract: Avalanche diodes have been fabricated on 4H-SiC substrate. These diodes show an abrupt avalanche voltage of about 59 V which corresponds to the calculated theoretical one using our previously determined impact ionization coefficients. This avalanche voltage increases by as small as 3.7 mV/K over the investigated temperature range (150K-420K).

Abstract: In this work we report on 3C-SiC heteroepitaxial growth on 4H-SiC(0001) substrates which were patterned to form mesa structures. Two different deposition techniques were used and compared: vapour-liquid-solid (VLS) mechanism and chemical vapour deposition (CVD). The results in terms of surface morphology evolution and the polytype formation using these growth techniques were studied and compared. It was observed both 4H lateral growth from the mesa sidewalls and 3C enlargement on top of the mesas, the former being faster with CVD and VLS. Only VLS technique allowed elimination of twin boundaries for proper orientation of the mesa sidewalls.

Abstract: Lateral normally-on dual gates MESFETs withstanding a drain/source voltage in excess of 200V have been fabricated on semi-insulating 4H-SiC substrate. This paper reports on the fabrication, DC characterization and in-circuit behavior of the MESFETs. Temperature dependent DC characterization has been carried out up to 473K. The performances of basic analog circuits such as an amplifier and a clock, using these MESFETs, are detailed and analyzed.

Abstract: Looking back to the development of inverters using SiC switches, it appears that SiC devices do not behave like their silicon counterparts. Their ability to operate at high temperature makes them attractive. Developing drivers suitable for 200 °C operation is not straightforward. In a perspective of high integration and large power density, it is wise to consider a monolithic integration of the driver parts for the sake of reliability. Silicon is not suitable for high ambient temperature; silicon-oninsulator offers better performances and presents industrial perspectives. The paper focuses on a SiC BJT driver: it processes logical orders from outside, drives adequately the BJT to turn it either on or off, monitors the turn-off and turn-on state of the device, and acts accordingly to prevent failure. SiC BJT imposes specific performances different from the well known ones of SiC JFET or MOSFET. The paper addresses a preliminary analysis of a SOI driver, anticipating the behavior of SiC-BJT and the change in behavior at high temperature. A discret driver has been designed and fabricated. Elementary functional blocks have been validated, and a BJT converter successfully operated at high temperature with high efficiency ( = 88%).

Abstract: The expansion of the electrical communications and distribution networks strongly contribute to the increase in the risks of appearance of defaults, such as over-voltage and/or over-current. These developments promote the emergence of safety devices for serial protection commonly named Current Limiting Devices (CLD's). This work presents the design, manufacture and characterization of silicon carbide accuMOSFET of high power density ratings. Components able to limit the current up to 450A @ 350V were manufactured and characterized. Specific characterization test benches were developed, able to provide high energy pulses required for characterization. CLDs behavior subjected to short overloads has been measured experimentally and analyzed be means of simulations for long-time overloads. A maximum sustainable high energy of 35 Joules has been estimated. This achievement give opportunities to build new architectures of serial protection systems.

Abstract: This paper reports on the influence of temperature on the electrical carrier lifetime of a 3.3 kV 4H-SiC PiN diode processed with a new generation of SiC material. The Open Circuit Voltage Decay (OCVD) is used to evaluate ambipolar lifetime evolution versus temperature. The paper presents a description of the setup, electrical measurements and extraction fittings. The ambipolar lifetime is found to rise from 600 ns at 30 °C to 3.5 μs at 150 °C.

Abstract: Complementary lateral structures, N-JFETs, P-JFETS and bipolar diodes, have been implemented in p and n-type 4H-SiC wafers with epilayers. The device were optimized using finite element code MEDICITM simulations, based on ion implanted and etched Reduced-Surface-Field structures. Two Ti/Ni alloy composition are found to form ohmic contacts compatibles with high temperature device operation. 900°C and respectively 1000°C post-metallisation annealing during 2min are necessary. The presence of a graphite layer is determined by XPS (X-ray photon spectroscopy) analyses at the metal-semiconductor interface. On the fabricated p and n-type lateral JFETs, in blocking state, breakdown voltage as high as 600V are obtained.

Abstract: High voltage SiC semiconductor devices have been successfully fabricated and some of them are commercially available [1]. To achieve experimental breakdown voltage values as close as possible to the theoretical value, i.e. value of the theoretical semi-infinite diode, it is necessary to protect the periphery of the devices against premature breakdown due to locally high electric fields. Mesa structures and junction termination extension (JTE) as well as guard rings, and combinations of these techniques, have been successfully employed. Each of them has particular drawbacks. Especially, JTE are difficult to optimize in terms of impurity dose to implant, as well as in terms of geometric dimensions. This paper is a study of the spreading of the electric field at the edge of bipolar diodes protected by JTE and field rings, by optical beam induced current.

Abstract: In this paper, we propose new designs of Schottky, JBS and PiN diodes, which process technology is compatible with that of vertical power SiC JFETs. Three novel diode designs are proposed and we report their electrical characteristics. The P+ buried layer implant of the JFET is used for the PiN anode formation and for the P+ islands of the JBS. The Schottky diode differs from a standard Schottky diode since buried rings below the Schottky contact region have been included and the anode metal layer also contacts the buried P+ region at the diode periphery. With this last approach, the resulting Schottky diodes show low leakage currents and surge current capability, with a lower on-state voltage than the JBS.

Abstract: Due to the significant achievements in SiC bulk material growth and in SiC device processing technology, this semiconductor has received a great interest for power devices, particularly for SiC high-voltage Schottky barrier rectifiers. The main difference to ultra fast Si pin diodes lies in the absence of reverse recovery charge in SiC SBDs. This paper reports on 4.5kV-8A SiC Schottky diodes / Si-IGBT modules. The Schottky termination design and the fabrication process gives a manufacturing yield of 40% for large area devices on standard starting material. Modules have been successfully assembled, containing Si-IGBTs and 4.5kV-SiC Schottky diodes and characterized in both static and dynamic regimes. The forward dc characteristics of the modules show an on-resistance of 33mohm.cm2 @ room temperatue (RT) and a very low reverse leakage current density (JR < 10 5A/cm2 @ 3.5kV). An experimental breakdown voltage higher than 4.7kV has been measured in the air on polyimide passivated devices. This value corresponds to a junction termination efficiency of at least 80% according to the epitaxial properties. These SiC SBDs are well suited for high voltage, medium current, high frequency switching aerospace applications, matching perfectly as freewheeling diodes with Si IGBTs.